H01L27/14698

Semiconductor Image Sensor Device Having Back Side Illuminated Image Sensors with Embedded Color Filters

Disclosed is a method of fabricating a semiconductor image sensor device. The method includes providing a substrate having a pixel region, a periphery region, and a bonding pad region. The substrate further has a first side and a second side opposite the first side. The pixel region contains radiation-sensing regions. The method further includes forming a bonding pad in the bonding pad region; and forming light-blocking structures over the second side of the substrate, at least in the pixel region, after the bonding pad has been formed.

LIGHT DETECTION SUBSTRATE, MANUFACTURING METHOD THEREOF AND LIGHT DETECTION APPARATUS
20220262834 · 2022-08-18 ·

The disclosure provides a light detection substrate, a manufacturing method thereof and a light detection apparatus. The light detection substrate includes a plurality of light detection units, each of the light detection units includes a first electrode, a second electrode and a photoelectric conversion layer, a spacer region exists between orthographic projections of the first electrode and the second electrode on a substrate, the photoelectric conversion layer is provided with at least one opening, and an orthographic projection of the at least one opening on the substrate is located in the spacer region.

Methods and apparatus for high reflectivity aluminum layers

Methods and apparatus for increasing reflectivity of an aluminum layer on a substrate. In some embodiments, a method of depositing an aluminum layer on a substrate comprises depositing a layer of cobalt or cobalt alloy or a layer of titanium or titanium alloy on the substrate with a chemical vapor deposition (CVD) process, pre-treating the layer of cobalt or cobalt alloy with a thermal hydrogen anneal at a temperature of approximately 400 degrees Celsius if a top surface of the layer of cobalt or cobalt alloy is compromised, and depositing a layer of aluminum on the layer of cobalt or cobalt alloy or the layer of titanium or titanium alloy with a CVD process at a temperature of approximately 120 degrees Celsius. Pre-treatment of the layer of cobalt or cobalt alloy may be accomplished for a duration of approximately 60 seconds to approximately 120 seconds.

Wafer-level process for curving a set of electronic chips

A wafer-level process includes providing a set of electronic chips, including a stack with a set of matrix arrays of pixels, an interconnect layer electrically connected to the set of matrix arrays of pixels, and a first layer, including vias electrically connected to the interconnect layer. The wafer-level process further includes forming metal pillars on the first layer, the pillars being electrically connected to the vias, and forming a material integrally with the first layer, around the metal pillars. The wafer-level process also includes dicing the electronic chips so as to release the thermomechanical stresses to which the stack is subjected. Finally, the wafer-level process includes making the metal pillars coplanar after dicing the electronic chips.

Chip package with substrate having first opening surrounded by second opening and method for forming the same
11450697 · 2022-09-20 · ·

A chip package including a substrate, a first conductive structure, and an electrical isolation structure is provided. The substrate has a first surface and a second surface opposite the first surface), and includes a first opening and a second opening surrounding the first opening. The substrate includes a sensor device adjacent to the first surface. A first conductive structure includes a first conductive portion in the first opening of the substrate, and a second conductive portion over the second surface of the substrate. An electrical isolation structure includes a first isolation portion in the second opening of the substrate, and a second isolation portion extending from the first isolation portion and between the second surface of the substrate and the second conductive portion. The first isolation portion surrounds the first conductive portion.

Image sensing device and manufacturing method thereof

Some embodiments of the present disclosure provide a back side illuminated (BSI) image sensor. The back side illuminated (BSI) image sensor includes a semiconductive substrate and an interlayer dielectric (ILD) layer at a front side of the semiconductive substrate. The ILD layer includes a dielectric layer over the semiconductive substrate and a contact partially buried inside the semiconductive substrate. The contact includes a silicide layer including a predetermined thickness proximately in a range from about 600 angstroms to about 1200 angstroms.

METHOD OF MANUFACTURING IMAGE SENSING CHIP PACKAGE STRUCTURE INCLUDING AN ADHESIVE LOOP
20220254826 · 2022-08-11 ·

An image sensing chip package structure includes a chip, an adhesive loop and a light-transmissible substrate member. The chip includes an image sensing region. The adhesive loop is connected to the chip, and has an inner peripheral surface that defines a plurality of protrusions which surround the image sensing region of the chip. The light-transmissible substrate member is connected to the adhesive loop oppositely of the chip to cover the image sensing region of the chip. Methods of manufacturing the image sensing chip package structures are also provided.

Sensors having an active surface
11387269 · 2022-07-12 · ·

Disclosed in one example is an apparatus including a substrate, a sensor over the substrate including an active surface and a sensor bond pad, a molding layer over the substrate and covering sides of the sensor, the molding layer having a molding height relative to a top surface of the substrate that is greater than a height of the active surface of the sensor relative to the top surface of the substrate, and a lidding layer over the molding layer and over the active surface. The lidding layer and the molding layer form a space over the active surface of the sensor that defines a flow channel.

Image sensing chip package structure including adhesive loop

An image sensing chip package structure includes a chip, an adhesive loop and a light-transmissible substrate member. The chip includes an image sensing region. The adhesive loop is connected to the chip, and has an inner peripheral surface that defines a plurality of protrusions which surround the image sensing region of the chip. The light-transmissible substrate member is connected to the adhesive loop oppositely of the chip to cover the image sensing region of the chip. Methods of manufacturing the image sensing chip package structures are also provided.

IMAGE SENSOR PACKAGE HAVING A CAVITY STRUCTURE FOR A LIGHT-TRANSMITTING MEMBER

According to an aspect, an image sensor package includes a substrate, an image sensor die coupled to the substrate, at least one conductor connected to the image sensor die and the substrate, and a light-transmitting member including a substrate member, a first leg member extending from a first edge portion of the substrate member, and a second leg member extending from a second edge portion of the substrate member, the first leg member being coupled to the substrate, the second leg member being coupled to the substrate.