An image sensor with a pinned photodiode includes a photodiode formed in a substrate by implanting dopants of a first type through one or more dielectric layers formed over the substrate. A pinning layer for the photodiode may be formed by implanting dopants of a second type through the same one or more dielectric layers. The pinning layer may be formed over a photodiode region of the substrate. The concentration of dopants of the second type may have a maximum value in dielectric layers over the photodiode that exceeds the concentration of dopants of the second type in the substrate below. The photodiode and pinning layer may both be formed by implanting ions of the first and second type respectively through a dielectric layer formed after etching away a portion of another dielectric layer, having a different thickness, and having different optical transmission properties than the another dielectric layer.

A charge-coupled device (CCD) image sensor is provided. The CCD image sensor may include an array of photosensors that transfer charge to multiple vertical CCD shift registers, which then in turn transfer the charge to a horizontal CCD shift register. The horizontal CCD shift register then feeds an output buffer circuit. The output buffer circuit can include multiple output stages, each of which can include a source-follower transistor coupled in series with a current sink transistor and at least one cascode transistor. The current sink transistor may have its gate terminal shorted to ground. In one arrangement, the cascode transistor has a gate terminal that receives a non-zero bias voltage. In another arrangement, the cascode transistor has a gate terminal that is also shorted to ground and operates in depletion mode.

Provided is a solid state imaging device including: a pixel unit; row drive circuits respectively corresponding to rows of the pixel unit, each including a first and a second signal generation units; drive signal generation unit configured to generate a readout scan signal and a shutter scan signal, as drive signals for driving pixels, based on signals output from the first and the second signal generation units; and a switching unit configured to switch the row drive circuit between: a first state in which the first signal generation unit generates the readout scan signal and the second signal generation unit generates the shutter scan signal and a second state in which the first signal generation unit generates the shutter scan signal and the second signal generation unit generates the readout scan signal.

A photodetector comprises a semiconductor substrate having an input surface for receiving illumination, control electrodes for control of photogenerated charge within the substrate and a filter on the radiation input surface of the substrate, the filter comprising a dielectric-metal band pass filter having a metal layer and one or more dielectric layers with one dielectric layer between the substrate surface and the metal layer. A connector is provided for applying a bias voltage to the metal layer with respect to the substrate. In effect, the metal layer of the band pass filter provides two functions. The first function is as part of the ITF filter selecting the wavelength desired for the device. The second function is as a conductive layer allowing a bias to be provided between the substrate and the metal layer thereby producing a field within the surface of the substrate to which the filter is applied.

The photosensitive region includes a first impurity region and a second impurity region having a higher impurity concentration than that of the first impurity region. The photosensitive region includes one end positioned away from the transfer section in the second direction and another end positioned closer to the transfer section in the second direction. A shape of the second impurity region in plan view is line-symmetric with respect to a center line of the photosensitive region along the second direction. A width of the second impurity region in the first direction increases in a transfer direction from the one end to the other end. An increase rate of the width of the second impurity region in each of sections, obtained by dividing the photosensitive region into n sections in the second direction, becomes gradually higher in the transfer direction. Here, n is an integer of two or more.

Disclosed is an image sensor may include a pixel array having a central region and peripheral regions around the central region, one or more first unit pixels arranged in the peripheral regions. Each of the first unit pixels comprising a pair of left and right photodiodes. The left and right photodiodes in at least one of the one or more of the first unit pixels may have different sizes and are optically isolated from each other by a first PD isolation region.

An image sensor includes a substrate that has a first pixel region and a second pixel region and a microlens layer on a first surface of the substrate. The microlens layer includes a first lens pattern on the first pixel region of the substrate; and a second lens pattern on the second pixel region of the substrate. A width of the first pixel region is greater than a width of the second pixel region, and a height of the first lens pattern is greater than a height of the second lens pattern.

An image sensor includes a substrate, a photoelectric conversion region disposed inside the substrate, a first active region disposed inside the substrate to include a ground region, a floating diffusion region, and a channel region for connecting the ground region and the floating diffusion region, a substrate trench disposed inside the channel region, a transfer gate disposed on a face of the substrate to include a lower gate which fills a part of the substrate trench and has a first width, and an upper gate having a second width smaller than the first width on the lower gate, and a gate spacer disposed inside the substrate trench to be interposed between the ground region and the upper gate.

A semiconductor device that includes an array of imaging cells is provided. Each imaging cell of the array of imaging cells includes an imaging region and first and second charge storage regions. Further, each imaging cell includes first and second quantum dot-in-quantum well (QD-in-QW) structures. The first QD-in-QW structure absorbs an incident electromagnetic radiation having a wavelength within a predetermined first wavelength band and generates a hole photocurrent. The second QD-in-QW structure absorbs an incident electromagnetic radiation having a wavelength within a predetermined second wavelength band and generates an electron photocurrent. Each imaging cell further includes p-type and n-type modulation doped QW structures that defines first and second buried QW channels. The first and second buried QW channels provide for lateral transfer of the hole and electron photocurrents for charge accumulation in the first and second charge storage regions, respectively.

An imaging device, including a monolithic semiconductor integrated circuit substrate, comprises a focal plane array of pixel cells. Each one of the pixel cells includes a gate overlying a region of the substrate operable to convert incident radiation into charge carriers. The pixel also includes a CMOS readout circuit including at least one output transistor in the substrate. The pixel further includes a charge coupled device section on the substrate adjacent the gate, the charge coupled device section including a sense node to receive charge carriers transferred from the region of the substrate beneath the gate. The sense node is coupled to the output transistor. The pixel also includes a reset switch coupled to the sense node. The pixel's charge coupled device section has a buried channel region. The pixel also includes one or more bias enabling switches operable to enable a bias voltage to be applied to the gate. At least one of the reset switch or the one or more bias enabling switches is formed in the buried channel region.