Various embodiments of the present disclosure are directed towards a method for forming a bipolar junction transistor (BJT). A dielectric film is deposited over a substrate and comprises a lower dielectric layer, an upper dielectric layer, and an intermediate dielectric layer between the lower and upper dielectric layers. A first semiconductor layer is deposited over the dielectric film and is subsequently patterned to form an opening exposing the dielectric film. A first etch is performed into the upper dielectric layer through the opening to extend the opening to the intermediate dielectric layer. Further, the first etch stops on the intermediate dielectric layer and laterally undercuts the first semiconductor layer. Additional etches are performed to extend the opening to the substrate. A lower base structure and an emitter are formed stacked in and filling the opening, and the first semiconductor layer is patterned to form an upper base structure.

A heterojunction bipolar transistor may include a base epitaxially grown on a collector, an emitter epitaxially grown on the base, the emitter and the base being patterned into a fin, and a silicon oxide layer formed on sidewalls of the fin, the silicon oxide layer separating the base from a spacer. The heterojunction bipolar transistor may include the spacer formed on top of the silicon oxide layer and an interlayer dielectric formed on top of the spacer. The heterojunction bipolar transistor may also include a silicon germanium oxide layer formed on sidewalls of the base. The base may be made of silicon germanium. The emitter and the collector may be made of silicon. The base may be doped with a p-type dopant. The emitter and the collector may be doped with a n-type dopant.

Wafer bonded GaN monolithic integrated circuits and methods of manufacture of wafer bonded GaN monolithic integrated circuits and their related structures for electronic and photonic integrated circuits and for multi-functional integrated circuits, are described herein. Other embodiments are also disclosed herein.

Transistors including semiconductor regions where operating current flows are provided above a substrate. Operating electrodes of conductive material having thermal conductivity higher than the semiconductor regions and contacting the semiconductor regions to conduct operating current to the semiconductor regions are disposed. A conductor pillar for external connection contains contact regions where the semiconductor regions and the operating electrodes contact, and is electrically connected to the operating electrodes. The contact regions are disposed in a first direction. Each contact region has a planar shape long in a second direction orthogonal to the first direction. A first average distance, obtained by averaging distances in the second direction from each end portion of the contact region in the second direction to an edge of the conductor pillar across the contact regions, exceeds an average distance value in a height direction from the contact region to a top surface of the conductor pillar.

A first sub-collector layer functions as an inflow path of a collector current that flows in a collector layer of a heterojunction bipolar transistor. A collector ballast resistor layer having a lower doping concentration than the first sub-collector layer is disposed between the collector layer and the first sub-collector layer.

The present disclosure relates to semiconductor structures and, more particularly, to a heterojunction bipolar transistor and methods of manufacture. The structure includes: a sub-collector region; a collector region in electrical connection to the sub-collector region; an emitter located adjacent to the collector region and comprising emitter material, recessed sidewalls on the emitter material and an extension region extending at an upper portion of the emitter material above the recessed sidewalls; and an extrinsic base separated from the emitter by the recessed sidewalls.

An emitter mesa and a base electrode are arranged on a base mesa on a substrate. A base wiring line on the base electrode is connected to the base electrode via base openings. The emitter mesa includes a plurality of emitter fingers having a planar shape that is long in one direction. The emitter fingers include first and second emitter fingers. The base openings are arranged so as to be spaced apart in a longitudinal direction from first end portions of the first emitter fingers and are not arranged in a region obtained by extending the second emitter finger in the longitudinal direction. An end portion of the second emitter finger that is near the base openings protrudes in the longitudinal direction beyond the end portions of the first emitter fingers that are near the base openings.

A bipolar transistor comprising a subcollector layer, and a collector layer on the subcollector layer. The collector layer includes a plurality of doped layers. The plurality of doped layers includes a first doped layer that has a highest impurity concentration thereamong and is on a side of or in contact with the subcollector layer. Also, the first doped layer includes a portion that extends beyond at least one edge of the plurality of doped layers in a cross-sectional view.

An epitaxial structure includes a composite base unit and an emitter unit. The composite base unit includes a first base layer and a second base layer formed on the first base layer. The first base layer is made of a material of In.sub.xGa.sub.(1-x)As.sub.(1-y)N.sub.y, in which 0<x≤0.2, and 0≤y≤0.035, and when y is not 0, x=3y. The second base layer is made of a material In.sub.mGa.sub.(1-m)As, in which 0.03≤m≤0.2. The emitter unit is formed on the second base layer 12 opposite to the first base layer 11, and is made of an indium gallium phosphide-based material. A transistor including the epitaxial structure is also disclosed.

A first sub-collector layer functions as an inflow path of a collector current that flows in a collector layer of a heterojunction bipolar transistor. A collector ballast resistor layer having a lower doping concentration than the first sub-collector layer is disposed between the collector layer and the first sub-collector layer.