H01L29/225

Semiconductor material having a compositionally-graded transition layer

A semiconductor material includes a compositionally-graded transition layer, an intermediate later and a gallium nitride material layer. The compositionally-graded transition layer has a back surface and a top surface, and includes a gallium nitride alloy. The gallium concentration in the compositionally-graded transition layer increases from the back surface to the front surface. The intermediate layer is formed under the compositionally-graded transition layer. The gallium nitride material layer is formed over the compositionally-graded transition layer, and has a crack level of less than 0.005 m/m.sup.2.

COATED SEMICONDUCTOR NANOCRYSTALS AND PRODUCTS INCLUDING SAME
20180342647 · 2018-11-29 ·

A coated quantum dot is provided wherein the quantum dot is characterized by having a solid state photoluminescence external quantum efficiency at a temperature of 90 C. or above that is at least 95% of the solid state photoluminescence external quantum efficiency of the semiconductor nanocrystal at 25 C. Products including quantum dots described herein are also disclosed.

Oxide thin film transistor, array substrate and display device

The embodiments of the present invention provides an oxide TFT, an array substrate and a display device, an oxide channel layer of the oxide TFT comprises a front channel oxide layer and a back channel oxide layer, a conduction band bottom of the back channel oxide layer being higher than a conduction band bottom of the front channel oxide layer, and a band gap of the back channel oxide layer being larger than a band gap of the front channel oxide layer. In the oxide TFT, the array substrate and the display device provided in the present invention, it is possible to accumulate a large number of electrons through the potential difference formed between oxide channel layers of a multilayer structure so as to increase the carrier concentration in the oxide channel layers to achieve the purpose of improving TFT mobility without damaging TFT stability.

Oxide thin film transistor, array substrate and display device

The embodiments of the present invention provides an oxide TFT, an array substrate and a display device, an oxide channel layer of the oxide TFT comprises a front channel oxide layer and a back channel oxide layer, a conduction band bottom of the back channel oxide layer being higher than a conduction band bottom of the front channel oxide layer, and a band gap of the back channel oxide layer being larger than a band gap of the front channel oxide layer. In the oxide TFT, the array substrate and the display device provided in the present invention, it is possible to accumulate a large number of electrons through the potential difference formed between oxide channel layers of a multilayer structure so as to increase the carrier concentration in the oxide channel layers to achieve the purpose of improving TFT mobility without damaging TFT stability.

Methods for coating semiconductor nanocrystals
10096678 · 2018-10-09 · ·

A coated quantum dot and methods of making coated quantum dots are provided.

Methods for coating semiconductor nanocrystals
10096678 · 2018-10-09 · ·

A coated quantum dot and methods of making coated quantum dots are provided.

Heterostructure of an electronic circuit having a semiconductor device

An electronic circuit having a semiconductor device is provided that includes a heterostructure, the heterostructure including a first layer of a compound semiconductor to which a second layer of a compound semiconductor adjoins in order to form a channel for a 2-dimensional electron gas (2DEG), wherein the 2-dimensional electron gas is not present. In aspects, an electronic circuit having a semiconductor device is provided that includes a III-V heterostructure, the III-V heterostructure including a first layer including GaN to which a second layer adjoins in order to form a channel for a 2-dimensional electron gas (2DEG), and having a purity such that the 2-dimensional electron gas is not present. It is therefore advantageous for the present electronic circuit to be enclosed such that, in operation, no light of wavelengths of less than 400 nm may reach the III-V heterostructure and free charge carriers may be generated by these wavelengths.

Heterostructure of an electronic circuit having a semiconductor device

An electronic circuit having a semiconductor device is provided that includes a heterostructure, the heterostructure including a first layer of a compound semiconductor to which a second layer of a compound semiconductor adjoins in order to form a channel for a 2-dimensional electron gas (2DEG), wherein the 2-dimensional electron gas is not present. In aspects, an electronic circuit having a semiconductor device is provided that includes a III-V heterostructure, the III-V heterostructure including a first layer including GaN to which a second layer adjoins in order to form a channel for a 2-dimensional electron gas (2DEG), and having a purity such that the 2-dimensional electron gas is not present. It is therefore advantageous for the present electronic circuit to be enclosed such that, in operation, no light of wavelengths of less than 400 nm may reach the III-V heterostructure and free charge carriers may be generated by these wavelengths.

HETEROJUNCTION BIPOLAR TRANSISTOR POWER AMPLIFIER WITH BACKSIDE THERMAL HEATSINK
20180211897 · 2018-07-26 ·

A heterojunction bipolar transistor may include an emitter, a base contacting the emitter, a collector contacting the base, a sub-collector contacting the collector, and an electrical isolation layer contacting the sub-collector. The heterojunction bipolar transistor may also include a backside heatsink thermally coupled to the sub-collector and the collector. The backside heatsink may be aligned with a central axis of the emitter and the base.

HETEROJUNCTION BIPOLAR TRANSISTOR POWER AMPLIFIER WITH BACKSIDE THERMAL HEATSINK
20180211897 · 2018-07-26 ·

A heterojunction bipolar transistor may include an emitter, a base contacting the emitter, a collector contacting the base, a sub-collector contacting the collector, and an electrical isolation layer contacting the sub-collector. The heterojunction bipolar transistor may also include a backside heatsink thermally coupled to the sub-collector and the collector. The backside heatsink may be aligned with a central axis of the emitter and the base.