Provided is a semiconductor device which use a two-dimensional semiconductor material as a channel layer. The semiconductor device includes: a gate electrode on a substrate; a gate dielectric on the gate electrode; a channel layer on the gate dielectric; and a source electrode and a drain electrode that may be electrically connected to the channel layer. The gate dielectric has a shape with a height greater than a width, and the channel layer includes a two-dimensional semiconductor material.

A thin film structure including a dielectric material layer and an electronic device to which the thin film structure is applied are provided. The dielectric material layer includes a compound expressed by ABO.sub.3, wherein at least one of A and B in ABO.sub.3 is substituted and doped with another atom having a larger atom radius, and ABO.sub.3 becomes A.sub.1-xA′.sub.xB.sub.1-yB′.sub.yO.sub.3 (where x>=0, y>=0, at least one of x and y≠0, a dopant A′ has an atom radius greater than A and/or a dopant B′ has an atom radius greater than B) through substitution and doping. A dielectric material property of the dielectric material layer varies according to a type of a substituted and doped dopant and a substitution doping concentration.

Disclosed is an oxide electrode for a device including a top electrode, a bottom electrode, and a polarizable material layer interposed between the top electrode and the bottom electrode. An oxide electrode is used as the bottom electrode unlike the top electrode.

A semiconductor device includes a gate electrode, a channel layer, and a ferroelectric layer. The ferroelectric layer includes a monocrystalline region located between the gate electrode and the channel layer to serve as a gate dielectric, and a polycrystalline region located at an edge of the gate electrode. A method for manufacturing the semiconductor device is also disclosed.

In an embodiment, a device includes: a source line extending in a first direction; a bit line extending in the first direction; a back gate between the source line and the bit line, the back gate extending in the first direction; a channel layer surrounding the back gate; a word line extending in a second direction, the second direction perpendicular to the first direction; and a data storage layer extending along the word line, the data storage layer between the word line and the channel layer, the data storage layer between the word line and the bit line, the data storage layer between the word line and the source line.

A method for forming a semiconductor device structure is provided. The method includes forming a first negative capacitance material over a substrate and patterning the first negative capacitance material to form a fin structure over the substrate. The method also includes forming a source feature and a drain feature in and protruding from a source region and a drain region of the fin structure. The method also includes forming a gate dielectric structure between the source feature and the drain feature to cover a channel region of the fin structure and forming a gate electrode layer over the gate dielectric structure.

A semiconductor device is provided. The semiconductor device includes a first stacked structure including a plurality of first insulating patterns and a plurality of first semiconductor patterns alternately stacked on a substrate, the first stacked structure extending in a first direction parallel to an upper surface of the substrate, a first conductive pattern on one side surface of the first stacked structure, the first conductive pattern extending in a second direction crossing the upper surface of the substrate, and a first ferroelectric layer between the first stacked structure and the first conductive pattern, the first ferroelectric layer extending in the second direction, wherein each of the first semiconductor patterns includes a first impurity region, a first channel region and a second impurity region which are sequentially arranged along the first direction.

A semiconductor device includes: a first electrode; a second electrode; and a dielectric layer stack positioned between the first electrode and the second electrode, the dielectric layer stack including a first anti-ferroelectric layer, a second anti-ferroelectric layer, and a ferroelectric layer between the first anti-ferroelectric layer and the second anti-ferroelectric.

Provided are electronic devices and methods of manufacturing the same. An electronic device may include a substrate, a gate electrode on the substrate, a ferroelectric layer between the substrate and the gate electrode, and a carbon layer between the substrate and the ferroelectric layer. The carbon layer may have an sp.sup.2 bonding structure.

A ferroelectric semiconductor device includes a substrate having a channel structure, a trench pattern having a bottom surface and a sidewall surface in the channel structure, a dielectric layer disposed on the bottom surface and the sidewall surface of the trench pattern, and a gate electrode layer disposed on the dielectric layer. The dielectric layer includes a ferroelectric layer pattern and a non-ferroelectric layer pattern that are disposed along the sidewall surface of the trench pattern.