A method of fabricating an electronic device includes providing a III-V substrate having a hexagonal crystal structure and a normal to a growth surface characterized by a misorientation from the <0001> direction of between 0.15 and 0.65. The method also includes growing a first III-V epitaxial layer coupled to the III-V substrate and growing a second III-V epitaxial layer coupled to the first III-V epitaxial layer. The method further includes forming a first contact in electrical contact with the III-V substrate and forming a second contact in electrical contact with the second III-V epitaxial layer.

A electrical switch has a first substrate, a first conducting layer disposed on the first substrate, a first dielectric layer disposed on the first conducting layer and a second conducting layer disposed on the first dielectric layer, and the second conducting layer disposed on the second substrate, and a conductive via connected to the first conducting layer and extending through the first dielectric layer. Active dielectric has a first conductor, a first dielectric layer disposed on the first conducting layer, one or more electrical switches disposed on the first dielectric layer, a dielectric layer disposed between neighboring electrical switches, the second dielectric layer disposed on the last electrical switch, and the second conducting layer disposed on the second dielectric layer.

Electronic devices and more particularly diamond-based electronic devices and corresponding contact structures are disclosed. Electrical contact structures to diamond layers, including n-type, phosphorus doped single-crystal diamond are disclosed. In particular, electrical contact structures are formed through an arrangement of one or more nanostructured carbon layers with high nitrogen incorporation that are provided between metal contacts and n-type diamond layers in diamond-based electronic devices. Nanostructured carbon layers may be configured to mitigate reduced phosphorus incorporation in n-type diamond layers, thereby providing low specific contact resistances for corresponding devices. Diamond p-i-n diodes for direct electron emission applications are also disclosed that include electrical contact structures with nanostructured carbon layers.

A method of forming a semiconductor device includes forming a first vertical protection device comprising a thyristor in a substrate, forming a first lateral trigger element for triggering the first vertical protection device in the substrate, and forming an electrical path in the substrate to electrically couple the first lateral trigger element with the first vertical protection device.

There are disclosed herein various implementations of a photodiode including a silicon substrate, and an N type germanium region situated over the silicon substrate, the N type germanium region being a cathode of the photodiode. In addition, the photodiode includes a P type germanium region situated over the N type germanium region, the P type germanium region being an anode of the photodiode. The photodiode also includes a P type silicon cap over the P type germanium region, an anode contact of the photodiode situated on the P type silicon cap, and one or more cathode contacts of the photodiode electrically connected to the N type germanium region.

A method is presented for integrating an electronic component in back end of the line (BEOL) processing. The method includes forming a first electrode over a semiconductor substrate, forming a first electrically conductive material over a portion of the first electrode, and forming a second electrically conductive material over the first electrically conductive material, where the first and second electrically conductive materials define a p-n junction. The method further includes depositing a second electrode between a set of spacers and in direct contact with the p-n-junction, depositing a phase change material over the p-n junction and in direct contact with the second electrode, and forming a third electrode over a portion of the phase change material.

A method of fabricating an electronic device includes providing a III-V substrate having a hexagonal crystal structure and a normal to a growth surface characterized by a misorientation from the <0001> direction of between 0.15 and 0.65 . The method also includes growing a first III-V epitaxial layer coupled to the III-V substrate and growing a second III-V epitaxial layer coupled to the first III-V epitaxial layer. The method further includes forming a first contact in electrical contact with the III-V substrate and forming a second contact in electrical contact with the second III-V epitaxial layer.

A process of making a short-circuited diode that changes the properties of an electric current that passes through the short-circuited diode so that the current does not harm a human that contacts the current after it passes through the diode.

A process of making a short-circuited diode that changes the properties of an electric current that passes through the short-circuited diode so that the current does not harm a human that contacts the current after it passes through the diode.

A method of manufacturing a semiconductor device that includes a semiconductor element. The method includes the steps of providing a semiconductor substrate of a first conductivity type, forming an element structure of the semiconductor element, at a first main surface of the semiconductor substrate, forming a first protective film at a second main surface of the semiconductor substrate, implanting ions in the semiconductor substrate from the second main surface having the first protective film formed thereon, and removing the first protective film.