Patent classifications
H01L31/022441
SOLAR CELL AND MANUFACTURING METHOD
A solar cell capable of preventing short-circuiting during signaling connection and a method for manufacturing the solar cell. A solar cell includes a semiconductor substrate, a first semiconductor layer having a conductivity type different from that of the semiconductor substrate. The first semiconductor layer includes a main functional portion which has a first base end portion on one side in a first direction of the semiconductor substrate over an entire length in a second direction and a plurality of first collecting portions extending from the first base end portion toward the other side in the first direction and on which a first electrode pattern is stacked, and an isolation portion which is formed linearly at an end portion on the other side in the first direction of the semiconductor substrate over an entire length in the second direction and on which the first electrode pattern is not stacked.
Flip-chip Multi-junction Solar Cell and Fabrication Method Thereof
A flip-chip multi junction solar cell chip integrated with a bypass diode includes from up to bottom: a glass cover; a transparent bonding layer; a front electrode; an n/p photoelectric conversion layer; a p/n tunnel junction; a structure layer of the n/p bypass diode; a first backside electrode; a second backside electrode. The solar cell chip also includes at least a through hole extending through the n/p photoelectric conversion layer, the p/n tunnel junction and the structure layer of the n/p bypass diode. An ultra-thin substrate-less cell can therefore be provided without occupying effective light receiving areas, greatly improving cell heat dissipation. With a light weight, the chip can also have advantages in space power application.
PHOTOVOLTAIC DEVICES, PHOTOVOLTAIC MODULES PROVIDED THEREWITH, AND SOLAR POWER GENERATION SYSTEMS
n-type amorphous semiconductor layers (4) and p-type amorphous semiconductor layers (5) are alternately disposed on the back surface of a semiconductor substrate (1) so as to be separated from each other at a desired interval paralleled with the direction of the surface of the semiconductor substrate (1). An electrode (6) is disposed on the n-type amorphous semiconductor layer (4), and an electrode (7) is disposed on the p-type amorphous semiconductor layer (5). A protective film (8) includes an insulating film, and is disposed on a passivation film (3), the n-type amorphous semiconductor layer (4), the p-type amorphous semiconductor layer (5), and the electrodes (6, 7), so as to be in contact with the passivation film (3), the n-type amorphous semiconductor layer (4), the p-type amorphous semiconductor layer (5), and the electrodes (6, 7).
Solar cell measuring apparatus
Discussed is a solar cell measuring apparatus to measure a current of a solar cell having a photoelectric converter and first and second electrodes electrically insulated from each other, both the first and second electrodes being located at one surface of the photoelectric converter. The solar cell measuring apparatus includes a measuring unit which includes a first measuring member corresponding to the first electrode and a second measuring member corresponding to the second electrode, wherein the first and second measuring members comes into close contact with the solar cell at the surface of the photoelectric converter to measure the current of the solar cell.
ROLL-TO-ROLL METALLIZATION OF SOLAR CELLS
Disclosed herein are approaches to fabricating solar cells, solar cell strings and solar modules using roll-to-roll foil-based metallization approaches. Methods disclosed herein can comprise the steps of providing at least one solar cell wafer on a first roll unit and conveying a metal foil to the first roll unit. The metal foil can be coupled to the solar cell wafer on the first roll unit to produce a unified pairing of the metal foil and the solar cell wafer. We disclose solar energy collection devices and manufacturing methods thereof enabling reduction of manufacturing costs due to simplification of the manufacturing process by a high throughput foil metallization process.
Solar array system and method of manufacturing
A space-grade solar array includes relatively small cells with integrated wiring embedded into or incorporated directly onto a printed circuit board. The integrated wiring provides an interface for solar cells having back side electrical contacts. The single side contacts enable the use of pick and place (PnP) technology in manufacturing the space-grade solar array. The solar cell is easily and efficiently packaged and electrically interconnected with other solar cells on a solar panel such as by using PnP process. The back side contacts are matched from a size and positioning standpoint to corresponding contacts on the printed circuit board.
MANUFACTURING METHOD FOR FLEXIBLE SILICON-BASED CELL MODULE
A manufacturing method for a flexible silicon-based cell module is provided. Specifically, cell units of a silicon-based solar cell structure are arranged and adhered to a connecting strip to form a cell string, wherein a gap is left between two adjacent cell units. The cell units in cell strings are connected in series and parallel by an interconnected bar, wherein a gap is left between two adjacent cell strings. Hard protection units adapted to the size and specification of the cell units are respectively attached to the cell units. A plurality of cell strings are connected to each other in series and parallel to form a cell assembly. A panel made of flexible material is selected to package the cell assembly to form the flexible cell module. The cell module has an excellent rollable performance and a flexible expansion, a light weight, and a small size.
THERMOCOMPRESSION BONDING APPROACHES FOR FOIL-BASED METALLIZATION OF NON-METAL SURFACES OF SOLAR CELLS
Thermocompression bonding approaches for foil-based metallization of non-metal surfaces of solar cells, and the resulting solar cells, are described. For example, a solar cell includes a substrate and a plurality of alternating N-type and P-type semiconductor regions disposed in or above the substrate. A plurality of conductive contact structures is electrically connected to the plurality of alternating N-type and P-type semiconductor regions. Each conductive contact structure includes a metal foil portion disposed in direct contact with a corresponding one of the alternating N-type and P-type semiconductor regions.
LOCAL PATTERNING AND METALLIZATION OF SEMICONDUCTOR STRUCTURES USING A LASER BEAM
Local patterning and metallization of semiconductor structures using a laser beam, e.g., micro-electronic devices, semiconductor substrates and/or solar cells, are described. For example, a method of fabricating a solar cell includes providing a substrate having an intervening layer thereon. The method also includes locating a metal foil over the intervening layer. The method also includes exposing the metal foil to a laser beam, wherein exposing the metal foil to the laser beam forms openings in the intervening layer and forms a plurality of conductive contact structures electrically connected to portions of the substrate exposed by the openings.
PHOTOVOLTAIC PRODUCT AND METHOD OF MANUFACTURING THE SAME
The present disclosure pertains to a photovoltaic product (1), comprising a foil with a photovoltaic layer stack (10) and an electrically conductive layer stack (20) that supports the photovoltaic layer stack and that in an operational state provides for a transport of electric energy generated by the photovoltaic layer stack to an external load. The electrically conductive layer stack (20) comprises a first and a second electrically conductive layer (21, 22) and an electrically insulating layer (23) arranged between the first and the second electrically conductive layer, wherein the photovoltaic layer stack (10) has first electrical contacts (PI, P2) of a first polarity that are electrically connected to the first electrically conductive background domain (210) and has second electrical contacts (N1, N2) of a second polarity opposite to said first polarity that are electrically connected to the first contact areas (211), and wherein the second electrically conductive background domain (220) and one or more of the second contact areas (221) serve as electric contacts for the output clamps.