An avalanche photodiode includes: a first semiconductor layer of a first conductivity type formed on a substrate of the first conductivity type; a second semiconductor layer of a second conductivity type formed under the first semiconductor layer; a third semiconductor layer of the first conductivity type formed in a shallow portion of the first semiconductor layer on the substrate, the third semiconductor layer having a higher concentration than an impurity concentration of the first semiconductor layer; a fourth semiconductor layer of the first conductivity type formed in a region in the first semiconductor layer immediately below the third semiconductor layer; a first contact electrically connected to the first semiconductor layer; and a second contact electrically connected to the second semiconductor layer. An impurity concentration of the fourth semiconductor layer is higher than that of the first semiconductor layer and is lower than that of the third semiconductor layer.

Subtractive metallization approaches for fabricating solar cells, and the resulting solar cells, are described. In an example, a solar cell includes a semiconductor region in or above a substrate. A metal foil portion can include an adhesive layer thereon. The adhesive layer is above the semiconductor region and has an opening therein exposing a portion of the semiconductor region. A conductive material is on and electrically coupled to the portion of the semiconductor region exposed by the opening in the adhesive layer. The conductive material is further on and electrically coupled to the metal foil portion.

Perovskite/silicon tandem solar cells have the potential to achieve high efficiencies through improvements to the optical and electrical parameters of perovskite/silicon tandem devices, via photon management, particularly using the optical band-edge shifting properties of silicon via surface modification of silicon. Silicon can directly extract the light generated charge carriers, which can achieve an efficiency of over 28%.

An imaging module (114) of an imaging system comprises a porous silicon membrane (116) with a first side (208), a contact side (210) opposite the first side, columns of silicon (212) configured to extend from the first side to the contact side, and columnar holes (214, 502) interlaced with the columns of silicon and configured to extend from the first side to the contact side. The imaging module further includes quantum dots (118) in the columnar holes. The imaging module further includes a metal pad (120) electrically coupled to the columns of silicon of the porous silicon membrane. The quantum dots in the columnar holes are electrically insulated from the metal pad. The imaging module further includes a substrate (122) with an electrically conductive pad (204) in electrical communication with the metal pad that defines a pixel.

An image sensor with high quantum efficiency is provided. In some embodiments, a semiconductor substrate includes a non-porous semiconductor layer along a front side of the semiconductor substrate. A periodic structure is along a back side of the semiconductor substrate. A high absorption layer lines the periodic structure on the back side of the semiconductor substrate. The high absorption layer is a semiconductor material with an energy bandgap less than that of the non-porous semiconductor layer. A photodetector is in the semiconductor substrate and the high absorption layer. A method for manufacturing the image sensor is also provided.

An image sensor with high quantum efficiency is provided. In some embodiments, a semiconductor substrate includes a non-porous semiconductor layer along a front side of the semiconductor substrate. A periodic structure is along a back side of the semiconductor substrate. A high absorption layer lines the periodic structure on the back side of the semiconductor substrate. The high absorption layer is a semiconductor material with an energy bandgap less than that of the non-porous semiconductor layer. A photodetector is in the semiconductor substrate and the high absorption layer. A method for manufacturing the image sensor is also provided.

A display panel and a manufacturing method thereof are provided. The display panel comprises a glass substrate, an insulating layer, a polysilicon layer, a gate insulating layer, a gate layer, an interlayer insulating layer, and a source-drain contacting layer, wherein the polysilicon layer is defined with a first doped region, a second doped region, and a third doped region. The source-drain contacting layer contacts the first doped region and the third doped region. A doping type of the first doped region and a doping type of the third doped region are different so that the first doped region and the third doped region form a PN structure. Doping type of the first doped region and a doping type of the second doped region are same.

A photo-detecting apparatus includes a semiconductor substrate. A first germanium-based light absorption material is supported by the semiconductor substrate and configured to absorb a first optical signal having a first wavelength greater than 800 nm. A first metal line is electrically coupled to a first region of the first germanium-based light absorption material. A second metal line is electrically coupled to a second region of the first germanium-based light absorption material. The first region is un-doped or doped with a first type of dopants. The second region is doped with a second type of dopants. The first metal line is configured to control an amount of a first type of photo-generated carriers generated inside the first germanium-based light absorption material to be collected by the second region.

An avalanche photodiode includes: a first semiconductor layer of a first conductivity type formed on a substrate of the first conductivity type; a second semiconductor layer of a second conductivity type formed under the first semiconductor layer; a third semiconductor layer of the first conductivity type formed in a shallow portion of the first semiconductor layer on the substrate, the third semiconductor layer having a higher concentration than an impurity concentration of the first semiconductor layer; a fourth semiconductor layer of the first conductivity type formed in a region in the first semiconductor layer immediately below the third semiconductor layer; a first contact electrically connected to the first semiconductor layer; and a second contact electrically connected to the second semiconductor layer. An impurity concentration of the fourth semiconductor layer is higher than that of the first semiconductor layer and is lower than that of the third semiconductor layer.

In one aspect, nanostructured films are described herein comprising controlled architectures on multiple length scales (e.g. 3). As described further herein, the ability to control film properties on multiple length scales enables tailoring structures of the films to specific applications including, but not limited to, optoelectronic, catalytic and photoelectrochemical cell applications. In some embodiments, a nanostructured film comprises a porous inorganic scaffold comprising particles of an electrically insulating inorganic oxide. An electrically conductive metal oxide coating is adhered to the porous inorganic scaffold, wherein the conductive metal oxide coating binds adjacent particles of the insulating inorganic oxide.