Patent classifications
H01L31/0288
SEMICONDUCTOR SENSOR AND METHODS THEREOF
A method and structure providing an optical sensor having an optimized Ge—Si interface includes providing a substrate having a pixel region and a logic region. In some embodiments, the method further includes forming a trench within the pixel region. In various examples, and after forming the trench, the method further includes forming a doped semiconductor layer along sidewalls and along a bottom surface of the trench. In some embodiments, the method further includes forming a germanium layer within the trench and over the doped semiconductor layer. In some examples, and after forming the germanium layer, the method further includes forming an optical sensor within the germanium layer.
Semiconductor infrared photodetectors
A semiconductor device capable of enhanced sub-bandgap photon absorption and detection is described. This semiconductor device includes a p-n junction structure formed of a semiconductor material, wherein the p-n junction structure is configured such that at least one side of the p-n junction (p-side or n-side) is spatially confined in at least one dimension of the device (e.g., the direction perpendicular to the p-n junction interface). Moreover, at least one side of the p-n junction (p-side or n-side) is heavily doped. The semiconductor device also includes electrical contacts formed on a semiconductor substrate to apply an electrical bias to the p-n junction to activate the optical response at target optical wavelength corresponds to an energy substantially equal to or less than the energy band-gap of the first semiconductor material. In particular embodiments, the semiconductor material is silicon.
Semiconductor infrared photodetectors
A semiconductor device capable of enhanced sub-bandgap photon absorption and detection is described. This semiconductor device includes a p-n junction structure formed of a semiconductor material, wherein the p-n junction structure is configured such that at least one side of the p-n junction (p-side or n-side) is spatially confined in at least one dimension of the device (e.g., the direction perpendicular to the p-n junction interface). Moreover, at least one side of the p-n junction (p-side or n-side) is heavily doped. The semiconductor device also includes electrical contacts formed on a semiconductor substrate to apply an electrical bias to the p-n junction to activate the optical response at target optical wavelength corresponds to an energy substantially equal to or less than the energy band-gap of the first semiconductor material. In particular embodiments, the semiconductor material is silicon.
Nanostructured units formed inside a silicon material and the manufacturing process to perform them therein
The invention bears on elementary nanoscale units nanostructured-formed inside a silicon material and the manufacturing process to implement them. Each elementary nanoscale unit is created by means of a limited displacement of two Si atoms outside a crystal elementary unit. A localized nanoscale transformation of the crystalline matter gets an unusual functionality by focusing in it a specific physical effect as is a highly useful additional set of electron energy levels that is optimized for the solar spectrum conversion to electricity. An adjusted energy set allows a low-energy secondary electron generation in a semiconductor, preferentially silicon, material for use especially in very-high efficiency all-silicon light-to-electricity converters. The manufacturing process to create such transformations in a semiconductor material bases on a local energy deposition like ion implantation or electron (γ,X) beam irradiation and suitable thermal treatment and is industrially easily available.
Nanostructured units formed inside a silicon material and the manufacturing process to perform them therein
The invention bears on elementary nanoscale units nanostructured-formed inside a silicon material and the manufacturing process to implement them. Each elementary nanoscale unit is created by means of a limited displacement of two Si atoms outside a crystal elementary unit. A localized nanoscale transformation of the crystalline matter gets an unusual functionality by focusing in it a specific physical effect as is a highly useful additional set of electron energy levels that is optimized for the solar spectrum conversion to electricity. An adjusted energy set allows a low-energy secondary electron generation in a semiconductor, preferentially silicon, material for use especially in very-high efficiency all-silicon light-to-electricity converters. The manufacturing process to create such transformations in a semiconductor material bases on a local energy deposition like ion implantation or electron (γ,X) beam irradiation and suitable thermal treatment and is industrially easily available.
SOLAR CELL AND MANUFACTURING METHOD OF SOLAR CELL
The present invention is a solar cell comprising a gallium-doped silicon substrate having a p-n junction formed therein, wherein the silicon substrate is provided with a silicon thermal oxide film at least on the first main surface of main surfaces of the silicon substrate, the first main surface being a main surface having a p-type region, and the silicon substrate is further doped with boron. This provides a solar cell that can possess high conversion efficiency while suppressing the photo-degradation even though having a silicon thermal oxide film as a passivation film of the substrate surface, and a method for manufacturing such a solar cell.
SOLAR CELL AND MANUFACTURING METHOD OF SOLAR CELL
The present invention is a solar cell comprising a gallium-doped silicon substrate having a p-n junction formed therein, wherein the silicon substrate is provided with a silicon thermal oxide film at least on the first main surface of main surfaces of the silicon substrate, the first main surface being a main surface having a p-type region, and the silicon substrate is further doped with boron. This provides a solar cell that can possess high conversion efficiency while suppressing the photo-degradation even though having a silicon thermal oxide film as a passivation film of the substrate surface, and a method for manufacturing such a solar cell.
SEMICONDUCTOR EPITAXIAL WAFER AND METHOD OF PRODUCING THE SAME, AND METHOD OF PRODUCING SOLID-STATE IMAGE SENSING DEVICE
To provide a semiconductor epitaxial wafer having an epitaxial layer with excellent crystallinity, the semiconductor epitaxial wafer is a semiconductor epitaxial wafer in which an epitaxial layer is formed on a surface of a semiconductor wafer, and the peak of the hydrogen concentration profile detected by SIMS lies in a surface portion of the semiconductor wafer on the side where the on the side where the epitaxial layer is formed.
SEMICONDUCTOR EPITAXIAL WAFER AND METHOD OF PRODUCING THE SAME, AND METHOD OF PRODUCING SOLID-STATE IMAGE SENSING DEVICE
To provide a semiconductor epitaxial wafer having an epitaxial layer with excellent crystallinity, the semiconductor epitaxial wafer is a semiconductor epitaxial wafer in which an epitaxial layer is formed on a surface of a semiconductor wafer, and the peak of the hydrogen concentration profile detected by SIMS lies in a surface portion of the semiconductor wafer on the side where the on the side where the epitaxial layer is formed.
SEMICONDUCTOR PHOTODIODE FUNCTIONING IN A WIDE BAND RANGE AND OBTAINING METHOD THEREOF
A semiconductor photodiode which functions in a wide band range up to medium wave infrared and far wavelengths in addition to visible region and near infrared includes: a light absorber region in micro structure which can provide light absorbance upon being roughened by laser; a first electrical lower contact coated with metal materials such as aluminium (Al), silver (Ag); a silicon which consists of crystalline silicon (c-Si); a second electrical lower contact which is coated with metal materials such as aluminium (Al), silver (Ag); a chalcogen doped hyper-filled silicone region which is obtained as a result of doping by pulse laser to the silicone region implanted by chalcogen elements; and upper electrical contact parts which are coated generally in the thickness range of 10 nm-1000 nm by using two-layered alloys with aluminium (Al)—(Al)-silver (Ag), two-layered alloys with titanium (Ti)-gold (Au), three-layered alloys with Ti-Platinum(Pt)—Au—Ag or three-layered alloys with Ti-lead(Pb)—Ag.