The present invention relates to a method for planarizing a CIS-based thin film, the method including: electropolishing a CIS-based compound layer by applying current or voltage to an electrochemical cell including: a CIS-based compound layer provided on a conductive base material, as a working electrode; a counter electrode; and an electrolyte solution including a precursor of elements constituting the CIS-based compound layer, a supporting electrolyte, a complexing agent, and an additive including a hydroxy functional group.

A method includes forming, on a substrate by performing physical vapor deposition in vacuum, an absorber layer including copper (Cu), indium (In), gallium (Ga) and selenium (Se), forming a stack including the substrate and an oxygen-annealed absorber layer by performing in-situ oxygen annealing of the absorber layer to improve quantum efficiency of the image sensor by passivating selenium vacancies due to dangling bonds, and forming a cap layer over the oxygen-annealed absorber layer by performing physical vapor deposition in vacuum. The cap layer includes at least one of: Ga.sub.2O.sub.3.Math.Sn, ZnS, CdS, CdSe, ZnO, ZnSe, ZnIn.sub.2Se.sub.4, CuGaS.sub.2, In.sub.2S.sub.3, MgO, or Zn.sub.0.8Mg.sub.0.2O.

Provided is a method of manufacturing a synaptic device. The method includes forming a first electrode, forming a synaptic mimic layer including a hole transport layer and an electron transport layer on the first electrode, and forming a second electrode on the synaptic mimic layer, wherein the forming of the synaptic mimic layer includes forming the electron transport layer on the hole transport layer through a solution process.

An imaging device that facilitates pooling processing. A pixel region includes a plurality of pooling modules and an output circuit, the pooling module includes a pooling circuit and a comparison module, the pooling circuit includes a plurality of pixels and an arithmetic circuit, and the comparison module includes a plurality of comparison circuits and a determination circuit. The pixel can obtain a first signal through photoelectric conversion, and can multiply the first signal by a given scaling factor to generate a second signal. The pooling circuit adds a plurality of second signals in the arithmetic circuit to generate a third signal, the comparison module compares a plurality of third signals and outputs the largest third signal to the determination circuit, and the determination circuit determines the largest third signal and binarizes it to generate a fourth signal. In the imaging device, the pooling module performs pooling processing in accordance with the number of pixels and outputs data obtained by the pooling processing.

The invention concerns a mirror (14), in particular for a photovoltaic cell (10), comprising a stack of layers (SC1, SC2, SC3, SC4, SC5, SC6), the layers (SC1, SC2, SC3, SC4, SC5, SC6) being superimposed along a stacking direction, the stack comprising: a first layer (SC1) of transparent conductive oxide, a second optical reflection layer (SC4) of metal, and a third layer (SC6) of conductive oxide.

A photovoltaic (PV) device having a quantum dot sensitized interface includes a first conductor layer and a second conductor layer. At least one of the conductor layers is transparent to solar radiation. A quantum dot (nanoparticle) sensitized photo-harvesting interface comprises a photo-absorber layer, a quantum dot layer and a buffer layer, placed between the two conductors. The absorber layer is a p-type material and the buffer layer is an n-type material. The quantum dot layer has a tunable bandgap to cover infrared (IR), visible light and ultraviolet (UV) bands of solar spectrum.

A photovoltaic device comprises a PIN structure in which a p-type hole transporting layer (2) is carried by a substrate (1) and a perovskite layer (3) and an n-type electron transporting layer (4) are arranged in sequence on the p-type layer. A light transmissive electrically conductive layer (9) is provided on top of the n-type electron transporting layer to form a light receiving top surface. Between the n-type electron transporting layer and the light transmissive conductive layer there is provided a structure comprising two inorganic electrically insulative layers (6, 8) having a layer of a conductive material (7) therebetween, wherein the two inorganic electrically insulative layers comprise a material having a band gap of greater than 4.5 eV and the layer of a conductive material comprises a material having a band gap of less than the band gap of the electrically insulative layers, wherein each electrically insulative layer forms a type-1 offset junction with the layer of conductive material.

An imaging device that facilitates pooling processing. A pixel region includes a plurality of pooling modules and an output circuit, the pooling module includes a pooling circuit and a comparison module, the pooling circuit includes a plurality of pixels and an arithmetic circuit, and the comparison module includes a plurality of comparison circuits and a determination circuit. The pixel can obtain a first signal through photoelectric conversion, and can multiply the first signal by a given scaling factor to generate a second signal. The pooling circuit adds a plurality of second signals in the arithmetic circuit to generate a third signal, the comparison module compares a plurality of third signals and outputs the largest third signal to the determination circuit, and the determination circuit determines the largest third signal and binarizes it to generate a fourth signal. In the imaging device, the pooling module performs pooling processing in accordance with the number of pixels and outputs data obtained by the pooling processing.

The present disclosure provides a detection substrate, a method for manufacturing the same and a flat panel detector. The detection substrate includes a base substrate and at least one pixel unit, the pixel unit includes: a transistor, an oxide layer, a reading electrode, and a photoelectric conversion structure sequentially arranged in a direction away from the base substrate, the reading electrode is electrically connected with the photoelectric conversion structure, the oxide layer is positioned between the transistor and the reading electrode, the oxide layer has a first through hole therein, an orthographic projection of the oxide layer on the base substrate at least covers that of the transistor on the base substrate, the reading electrode is electrically connected with the transistor through the first through hole, orthographic projections of the first through hole and the transistor on the base substrate are not overlapped with each other.

A photosensitive element includes a first film layer, a second film layer and a third film layer. The first film layer, the second film layer and the third film layer are in a sequentially stacked structure, the first film layer is a p-type copper indium gallium selenide (CIGS) layer, the second film layer is an i-type CIGS layer, and the third film layer is an n-type film layer, and the first film layer, the second film layer and the third film layer form a PIN junction structure.