The present disclosure pertains to the field of back contact heterojunction cell technologies, and particularly relates to a mask-layer-free hybrid passivation back contact cell and a fabrication method thereof; the method includes: S101: providing a silicon wafer substrate; S102: sequentially forming a first semiconductor layer and a mask layer on a back surface of the silicon wafer substrate, wherein the first semiconductor layer includes a tunneling oxide layer and a first doped polycrystalline layer; S103: performing first etching on the first semiconductor layer on the obtained back surface to form first opening regions W.sub.1; S104: forming a textured surface in the first opening region W.sub.1 on the back surface by texturing and cleaning; S105: removing the mask layer; S106: forming a second semiconductor layer on the obtained back surface; and S107: performing second etching on a polished region of the obtained back surface.

Disclosed is a solar cell including a semiconductor substrate, and a dopant layer disposed over one surface of the semiconductor substrate and having a crystalline structure different from that of the semiconductor substrate, the dopant layer including a dopant. The dopant layer includes a plurality of semiconductor layers stacked one above another in a thickness direction thereof, and an interface layer interposed therebetween. The interface layer is an oxide layer having a higher concentration of oxygen than that in each of the plurality of semiconductor layers.

A method for manufacturing a solar cell can include forming a tunnel layer on a back surface of a semiconductor substrate; forming an amorphous silicon layer on the tunnel layer; crystallizing the amorphous silicon layer into a crystalline silicon layer; performing a diffusion process to form a doped region in the crystalline silicon layer; forming an insulating layer on the crystalline silicon layer; and forming an electrode contacting with the crystalline silicon layer through an opening of the insulating layer.

A method for manufacturing a solar cell can include forming a tunneling layer on first and second surfaces of a semiconductor substrate, the tunneling layer including a dielectric material; forming a polycrystalline silicon layer on the tunnel layer at the first surface and on the second surface of the semiconductor substrate; removing portions of the tunnel layer and the polycrystalline silicon layer formed at the first surface of the semiconductor substrate; forming a doping region at the first surface of the semiconductor substrate by diffusing a dopant; forming a passivation layer on the polycrystalline silicon layer at the second surface of the semiconductor substrate; and forming a second electrode connected to the polycrystalline silicon layer by penetrating through the passivation layer.

A solar cell can include a silicon substrate; a tunnel layer disposed on a first surface of the silicon substrate, the tunnel layer including a dielectric material; a polycrystalline silicon layer disposed on the tunnel layer; a dielectric layer disposed on the polycrystalline silicon layer; and an electrode penetrating through the dielectric layer and directly contacting with the polycrystalline silicon layer, wherein the polycrystalline silicon layer includes a metal crystal region positioned at a region where the polycrystalline silicon layer contacts the electrode, and wherein the metal crystal region includes a plurality of metal crystals, the plurality of metal crystals including a metal material same as a metal material included in the electrode.

A photodetecting device and method of using the same are provided. Light is used to irradiate the optical filter layer of the photodetecting device and positions of the electrons and the holes in the polycrystalline silicon nano-channel layer are rearranged by the light with a wavelength range capable of passing through the optical filter layer. The current between the source and the drain is changed by rearranging the positions of the electrons and the holes, so as to generate a current difference. The intensity of the light is calculated by the current difference.

This application provides a display device and an active array switch substrate thereof. The active array switch substrate includes: a substrate; active array switches, formed on the substrate, where the active array switch includes a source electrode; at least one solar structure, disposed on the source electrode, where the solar structure includes a solar cell; and a transparent electrode, covered on the solar cell. The solar cell includes an N-type layer, an I-type layer of a microcrystalline silicon structure, and a P-type layer sequentially stacked in a direction away from the source electrode.

Embodiments of the present disclosure provide a solar cell and a solar cell module. The solar cell includes a first region and a second region, and further includes a substrate having a first surface and a second surface; a tunneling layer covering the second surface; a first emitter formed on part of the tunneling layer in the first region; and a second emitter formed on part of the tunneling layer in the second region and on the first emitter, a conductivity type of the second emitter being different from a conductivity type of the first emitter. The solar cell further includes a first electrode configured to electrically connect with the first emitter by penetrating through the second emitter; and a second electrode formed in the second region and configured to electrically connect with the second emitter.

A photodetecting device and method of using the same are provided. The photodetecting device includes a transistor, a silicon nano-channel and a filter dye layer. The transistor includes a source, a drain and a gate. The silicon nano-channel connects the source and the drain, and is configured to receive light. The filter dye layer is over a light-receiving surface of the silicon nano-channel.

The present disclosure pertains to the field of back contact heterojunction cell technologies, and particularly relates to a mask-layer-free hybrid passivation back contact cell and a fabrication method thereof; the method includes: S101: providing a silicon wafer substrate; S102: sequentially forming a first semiconductor layer and a mask layer on a back surface of the silicon wafer substrate, wherein the first semiconductor layer includes a tunneling oxide layer and a first doped polycrystalline layer; S103: performing first etching on the first semiconductor layer on the obtained back surface to form first opening regions W.sub.1; S104: forming a textured surface in the first opening region W.sub.1 on the back surface by texturing and cleaning; S105: removing the mask layer; S106: forming a second semiconductor layer on the obtained back surface; and S107: performing second etching on a polished region of the obtained back surface.