An open circuit voltage photodetector comprises a photovoltaic device including a photovoltaic junction, and a transistor. The photovoltaic device is connected to the gate terminal of the transistor to input an open circuit voltage of the photovoltaic device to the gate terminal. An array of such photodetectors and a readout integrated circuit forms an image sensor. In a photodetection method, an open circuit voltage is generated in a photovoltaic device in response to illumination by incident radiation, and the open circuit voltage is applied to a gate terminal of a transistor to modulate a channel current flowing in a channel of the transistor. A readout electronic circuit may be fabricated with an extra transistor, and a photovoltaic device disposed on the readout electronic circuit and electrically connected to apply an open circuit voltage of the photovoltaic device to a gate of the extra transistor.

An open circuit voltage photodetector comprises a photovoltaic device including a photovoltaic junction, and a transistor. The photovoltaic device is connected to the gate terminal of the transistor to input an open circuit voltage of the photovoltaic device to the gate terminal. An array of such photodetectors and a readout integrated circuit forms an image sensor. In a photodetection method, an open circuit voltage is generated in a photovoltaic device in response to illumination by incident radiation, and the open circuit voltage is applied to a gate terminal of a transistor to modulate a channel current flowing in a channel of the transistor. A readout electronic circuit may be fabricated with an extra transistor, and a photovoltaic device disposed on the readout electronic circuit and electrically connected to apply an open circuit voltage of the photovoltaic device to a gate of the extra transistor.

To provide a light receiving element including: a photoelectric conversion unit (PD) that is provided in a semiconductor substrate and converts light into a charge; a first charge accumulation unit (MEM) to which the charge is transferred from the photoelectric conversion unit; a second charge accumulation unit (MEM) to which the charge is transferred from the photoelectric conversion unit, in which each of the first and second charge accumulation units includes a stack of an electrode, a first insulating layer, and a semiconductor layer.

A light emitting diode device comprising: a plurality of nanowires or nanopyramids grown on a graphitic substrate, said nanowires or nanopyramids having a p-n or p-i-n junction, a first electrode in electrical contact with said graphitic substrate; a light reflective layer in contact with the top of at least a portion of said nanowires or nanopyramids, said light reflective layer optionally acting as a second electrode; optionally a second electrode in electrical contact with the top of at least a portion of said nanowires or nanopyramids, said second electrode being essential where said light reflective layer does not act as an electrode; wherein said nanowires or nanopyramids comprise at least one group III-V compound semiconductor; and wherein in use light is emitted from said device in a direction substantially opposite to said light reflective layer.

A photoelectric conversion element for detecting the spot size of incident light. The photoelectric conversion element includes a photoelectric conversion substrate having two principal surfaces, and comprises a first sensitive part and a second sensitive part that have mutually different photoelectric conversion characteristics. When a sensitive region appearing in the principal surface of the first sensitive part is defined as a first sensitive region, and a sensitive region appearing in the principal surface of the second sensitive part is defined as a second sensitive region, the first sensitive region is configured to receive at least a portion of light incident on a light-receiving surface and to decrease, proportionally to enlargement in an irradiation region of the principal surface irradiated with the incident light, the ratio of the first sensitive region to the second sensitive region in the irradiation region.

The invention relates to a process for fabricating at least tensilely strained planar photodiode 1, comprising producing a stack formed from a semiconductor layer 53, 55 made of a first material and from an antireflection layer 20; producing a peripheral trench 30 that opens onto a seed sublayer 22 made of a second material of the antireflection layer 20; epitaxy of a peripheral section 31 made of the second material in the peripheral trench 30; and returning to room temperature, a detecting section 10 then being tensilely strained because of the difference in coefficients of thermal expansion between the two materials.

This invention provides a light-concentrating structure with photosensitivity enhancing effect, including the substrate, buried layer, first electrode layer, second electrode layer, dielectric layer and interconnection structure. The substrate is equipped with a housing space; the buried layer is arranged above the substrate with the housing space; the first electrode layer is arranged above the buried layer; the second electrode layer is arranged in the middle of the first electrode layer; the dielectric layer is arranged above the second electrode layer; the interconnection structure is arranged above the substrate and the first electrode layer surrounding the dielectric layer, which forms an opening and a light-concentrating recess groove.

A waveguide photodetector includes a first contact layer of a first conductivity type, a waveguide layer, and a second contact layer of a second conductivity type that are sequentially formed on the semiconductor substrate. The waveguide layer includes a first cladding layer of the first conductivity type disposed on a side of the first contact layer, a second cladding layer of the second conductivity type disposed on a side of the second contact layer, and the core layer disposed between the first cladding layer and the second cladding layer. The core layer includes a light absorption layer and an impurity-doped light absorption layer that has a higher concentration of a p-type impurity than that of the light absorption layer and is disposed on a side of a light incident face.

A device may include: a highly doped n.sup.+ Si region; an intrinsic silicon multiplication region disposed on at least a portion of the n.sup.+ Si region, the intrinsic silicon multiplication having a thickness of about 90-110 nm; a highly doped p.sup.− Si charge region disposed on at least part of the intrinsic silicon multiplication region, the p.sup.− Si charge region having a thickness of about 40-60 nm; and a p.sup.+ Ge absorption region disposed on at least a portion of the p.sup.− Si charge region; wherein the p.sup.+ Ge absorption region is doped across its entire thickness. The thickness of the n.sup.+ Si region may be about 100 nm and the thickness of the p.sup.− Si charge region may be about 50 nm. The p.sup.+ Ge absorption region may confine the electric field to the multiplication region and the charge region to achieve a temperature stability of 4.2 mV/° C.

Microstructures of micro and/or nano holes on one or more surfaces enhance photodetector optical sensitivity. Arrangements such as a CMOS Image Sensor (CIS) as an imaging LIDAR using a high speed photodetector array wafer of Si, Ge, a Ge alloy on SI and/or Si on Ge on Si, and a wafer of CMOS Logic Processor (CLP) ib Si fi signal amplification, processing and/or transmission can be stacked for electrical interaction. The wafers can be fabricated separately and then stacked or can be regions of the same monolithic chip. The image can be a time-of-flight image. Bayer arrays can be enhanced with microstructure holes. Pixels can be photodiodes, avalanche photodiodes, single photon avalanche photodiodes and phototransistors on the same array and can be Ge or Si pixels. The array can be of high speed photodetectors with data rates of 56 Gigabits per second, Gbps, or more per photodetector.