The present technology relates to a solid-state imaging apparatus and a driving method that can perform imaging at lower power consumption. By providing the solid-state imaging apparatus including a pixel array section on which a plurality of SPAD pixels is two-dimensionally arranged, in which in a case where illuminance becomes first illuminance higher than reference illuminance, a part of the SPAD pixels of the plurality of pixels arranged on the pixel array section is thinned, it is possible to image at lower power consumption. The present technology can be applied to an image sensor, for example.

A photodetector including: an amplification region that includes a PN junction provided in a depth direction in a semiconductor layer and that is to be electrically coupled to a cathode; a separation region that defines a pixel region including the amplification region; a hole accumulation region that is provided along a side surface of the separation region and that is to be electrically coupled to an anode; and a gate electrode provided in a region between the amplification region and the hole accumulation region and stacked over the semiconductor layer with a gate insulating film interposed therebetween.

A photodetector including: an amplification region that includes a PN junction provided in a depth direction in a semiconductor layer and that is to be electrically coupled to a cathode; a separation region that defines a pixel region including the amplification region; a hole accumulation region that is provided along a side surface of the separation region and that is to be electrically coupled to an anode; and a gate electrode provided in a region between the amplification region and the hole accumulation region and stacked over the semiconductor layer with a gate insulating film interposed therebetween.

Example aspects are directed to operating a SPAD receiver such as may be used in a light detection and ranging (Lidar) system. In one example, the SPAD receiver has SPAD circuitry for multiple photon detections using a single-channel TDC (time-to-digital converter), and such photon detection is quenched after detection so as to establish an effective pre-defined OFF period. In response, the SPAD circuitry is recharged for a subsequent ON period during which the SPAD circuitry is unquenched (or armed) for further photon detection and processing.

Example aspects are directed to operating a SPAD receiver such as may be used in a light detection and ranging (Lidar) system. In one example, the SPAD receiver has SPAD circuitry for multiple photon detections using a single-channel TDC (time-to-digital converter), and such photon detection is quenched after detection so as to establish an effective pre-defined OFF period. In response, the SPAD circuitry is recharged for a subsequent ON period during which the SPAD circuitry is unquenched (or armed) for further photon detection and processing.

Provided is a semiconductor device capable of improving the optical response speed. The semiconductor device includes a pixel array portion in which a plurality of pixels are arranged in a matrix, each of the plurality of pixels including: a pixel forming region partitioned by a separation region in a semiconductor layer; a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type sequentially arranged from a first surface side of the pixel forming region toward a second surface side opposite to the first surface; a pn junction portion in which the first semiconductor region and the second semiconductor region are bonded; a charge extraction region of the second conductivity type provided in a side wall of the separation region; and a relay region of the second conductivity type provided at a position deeper than the second semiconductor region so as to be connected to the charge extraction region and the second semiconductor region. A plurality of the pn junction portions are scattered apart from each other, and the relay region has a higher impurity concentration than the second semiconductor region and terminates at a peripheral portion so as to surround a central portion of a surface of the second semiconductor region opposite to the pn junction portion side.

Provided is a semiconductor device capable of improving the optical response speed. The semiconductor device includes a pixel array portion in which a plurality of pixels are arranged in a matrix, each of the plurality of pixels including: a pixel forming region partitioned by a separation region in a semiconductor layer; a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type sequentially arranged from a first surface side of the pixel forming region toward a second surface side opposite to the first surface; a pn junction portion in which the first semiconductor region and the second semiconductor region are bonded; a charge extraction region of the second conductivity type provided in a side wall of the separation region; and a relay region of the second conductivity type provided at a position deeper than the second semiconductor region so as to be connected to the charge extraction region and the second semiconductor region. A plurality of the pn junction portions are scattered apart from each other, and the relay region has a higher impurity concentration than the second semiconductor region and terminates at a peripheral portion so as to surround a central portion of a surface of the second semiconductor region opposite to the pn junction portion side.

An avalanche photo-diode (APD) circuit includes a first APD and a bias circuit. The first APD is configured to detect light. The bias circuit is configured to control a gain of the first APD. The bias circuit includes a second APD, a reference voltage source, a bias voltage generation circuit, and a metal layer configured to shield the second APD from the light. The reference voltage source is configured to bias the second APD. The bias voltage generation circuit is configured to generate a bias voltage for biasing the first APD based on dark current output by the second APD.

An avalanche photo-diode (APD) circuit includes a first APD and a bias circuit. The first APD is configured to detect light. The bias circuit is configured to control a gain of the first APD. The bias circuit includes a second APD, a reference voltage source, a bias voltage generation circuit, and a metal layer configured to shield the second APD from the light. The reference voltage source is configured to bias the second APD. The bias voltage generation circuit is configured to generate a bias voltage for biasing the first APD based on dark current output by the second APD.

A total station or a theodolite includes scanning functionality for optical surveying of an environment, in which the total station or the theodolite is configured such that direction-dependent active acquisition regions of the receiver are defined depending on the transmission direction of the transmitted radiation to adapt the receiver surface mechanically and/or electronically to a varying imaging position of the received radiation on the overall detector surface.