Patent classifications
H01L31/113
Display panel for processing biometrics using TFT photodetectors integrated thereon
A display panel includes a display pixel configured to irradiate light, an image sensor pixel included together with the display pixel in one unit pixel, including a thin film transistor (TFT) photodetector including an active layer formed of amorphous silicon or polycrystalline silicon on an amorphous transparent material, and configured to collect light reflected from a body located on the transparent material, and a processor configured to process biometrics along with positioning of the body according to the light reflected from the body.
Single photon avalanche gate sensor device
A semiconductor substrate doped with a first doping type is positioned adjacent an insulated gate electrode that is biased by a gate voltage. A first region within the semiconductor substrate is doped with the first doping type and biased with a bias voltage. A second region within the semiconductor substrate is doped with a second doping type that is opposite the first doping type. Voltage application produces an electrostatic field within the semiconductor substrate causing the formation of a fully depleted region within the semiconductor substrate. The fully depleted region responds to absorption of a photon with an avalanche multiplication that produces charges that are collected at the first and second regions.
Light emitting transducer
A light emitting transducer including a flexible sheet having a bottom side and a top side, the flexible sheet including a substrate that is stretchable and compressible, the substrate having a bottom substrate surface at the bottom side, and a top substrate surface facing towards the top side, the top substrate surface comprising a surface pattern of a plurality of raised and depressed micro-scale surface portions which extend in at least one direction; a light emitting diode layer above the substrate and conforming in shape to the top substrate surface, the light emitting diode layer corresponding with the surface pattern of the top substrate surface, wherein the light emitting diode layer has a bottom diode surface facing towards the bottom side, and a top diode surface facing towards the top side, a bottom electrode on the bottom diode surface, and a top electrode on the top diode surface.
Photosensitive device with electric shutter
A photosensitive transistor or voltage-mode device which comprises a gate electrode, a layer of ambipolar two-dimensional material such as graphene and a layer of photoactive semiconducting material forms a junction with the ambipolar two-dimensional material. The photoactive semiconducting material and the ambipolar two-dimensional material are configured so that there is a non-screening gate voltage interval where an interface voltage at the junction between the photoactive semiconducting layer and the ambipolar two-dimensional material can be changed by applying to the gate electrode a gate voltage which falls within the non-screening gate voltage interval. The non-screening gate voltage interval comprises a flat-band gate voltage at which the interface voltage is zero. An electrical shutter can be operated at this gate voltage.
Touch screen panel for sensing touch using TFT photodetectors integrated thereon
A touch screen panel using a thin film transistor (TFT) photodetector includes a touch panel including at least one unit pattern for sensing light reflected by a touch by using a TFT photodetector including an active layer formed of amorphous silicon or polycrystalline silicon on an amorphous transparent material, and a controller configured to scan the at least one unit pattern and read touch coordinates as a result of the scanning.
SEMICONDUCTOR ELEMENT, SEMICONDUCTOR DEVICE AND SEMICONDUCTOR SYSTEM
A semiconductor element and/or semiconductor device having enhanced semiconductor characteristics useful as power devices are provided. A semiconductor element, including: a first electrode; a second electrode; an n−-type semiconductor layer; and a low electrically conductive layer, the low electrically conductive layer that is arranged between the first electrode and the n−-type semiconductor layer, a first barrier height of the first electrode is larger than a second barrier height of the second electrode, a first electrical resistivity of the low electrically conductive layer is equal to or more than 1000 times as large as a second electrical resistivity of the n−-type semiconductor layer, and the semiconductor element that is configured to be able to irradiate light from an outside to at least a part of the low electrically conductive layer.
IR PHOTODETECTOR WITH INTERCALATED GRAPHENE LAYER AND RELATED METHODS
An IR photodetector detects IR radiation in a frequency range. The IR photodetector includes an electrically conductive layer, first and second vertical supports extending from the electrically conductive layer and defining a cavity therebetween and over the electrically conductive layer, and a transparent electrically conductive layer carried by the first and second vertical supports and over the cavity. The transparent electrically conductive layer defines a gate electrode. The IR photodetector also includes a detector layer over the transparent electrically conductive layer and having a perforated pattern. The detector layer has graphene layers intercalated with ferric chloride layers. The IR photodetector also includes first and second electrically conductive contacts carried by the transparent electrically conductive layer on opposite sides of the detector layer.
DISPLAY MODULE AND METHOD FOR MONITORING BACKLIGHT BRIGHTNESS COMPRISING AN ARRAY SUBSTRATE WITH PLURAL GATE LINES, DATA LINES AND A PHOTOSENSITIVE UNIT
A display module and a method for monitoring backlight brightness are provided in the present disclosure. The display module includes a display region including an opening region and a non-opening region. The display module includes a backlight module and an array substrate. The array substrate is at a light-exiting side of the backlight module. The array substrate includes a plurality of gate lines which extends along a first direction and is arranged along a second direction, and further includes a plurality of data signal lines which is arranged along the first direction and extends along the second direction. The array substrate further includes a first substrate and at least one photosensitive unit, where the photosensitive unit is at a side of the first substrate away from the backlight module; and the photosensitive unit is disposed at the non-opening region for sensing a luminous brightness of the backlight module.
Dense wavelength division multiplexing (DWDM) photonic integration platform
A Dense Wavelength Division Multiplexing (DWDM) photonic integration circuit (PIC) that implements a DWDM system, such as a transceiver, is described. The DWDM PIC architecture includes photonic devices fully integrating on a single manufacturing platform. The DWDM PIC has a multi-wavelength optical laser, a quantum dot (QD) laser with integrated heterogeneous metal oxide semiconductor (H-MOS) capacitor, integrated on-chip. The multi-wavelength optical laser can be a symmetric comb laser that generates two equal outputs of multi-wavelength light. Alternatively, the DWDM PIC can be designed to interface with a stand-alone multi-wavelength optical laser that is off-chip. In some implementations, the DWDM PIC integrates multiple optimally designed photonic devices, such as a silicon geranium (SiGe) avalanche photodetector (APD), an athermal H-MOS wavelength splitter, a QD photodetector, and a heterogenous grating coupler. Accordingly, fabricating the DWDM PIC includes a unique III-V to silicon bonding process, which is adapted for its use of SiGe APDs.
Hybrid field effect transistor and surface enhanced infrared absorption based biosensor
A semiconductor structure, the semiconductor structure including a channel connecting a source on the semiconductor substrate and a drain on the semiconductor substrate, wherein the channel comprises a plasmonic resonator. A sensor including a plasmonic film, wherein the plasmonic film includes a sensitivity to a known analyte, a semiconductor structure including a source and a drain of a field effect transistor, and an electrical connection between the plasmonic film and a gate of the semiconductor structure. A method of forming a sensor including forming a field effect transistor (“FET”) on a semiconductor substrate, the field effect transistor including a source, a drain, and a gate, where the gate includes a plasmonic resonator.