H01L2221/68331

Method of manufacturing semiconductor device
11521948 · 2022-12-06 · ·

A method of manufacturing a semiconductor device, includes: preparing a support substrate having a peeling layer formed on a main surface side; partially forming a wiring layer above the peeling layer; arranging a semiconductor chip on the support substrate so that a pad of the semiconductor chip is electrically connected to the wiring layer; forming an encapsulating layer that encapsulates at least a part of the wiring layer and the semiconductor chip and is in contact with the peeling layer or a layer above the peeling layer so as to form an intermediate laminated body including the semiconductor chip, the wiring layer, and the encapsulating layer on the support substrate; cutting a peripheral portion of the support substrate after forming the intermediate laminated body; and mechanically peeling the intermediate laminated body from the support substrate with the peripheral portion cut away, with the peeling layer being as a boundary.

Semiconductor Package and Method of Manufacturing The Same
20220384212 · 2022-12-01 ·

A method includes forming a set of through-vias in a substrate, the set of through-vias partially penetrating a thickness of the substrate. First connectors are formed over the set of through-vias on a first side of the substrate. The substrate is singulated to form dies. The first side of the dies are attached to a carrier. The dies are thinned from the second side to expose the set of through-vias. Second connectors are formed over the set of through-vias on the second side of the dies. A device die is bonded to the second connectors. The dies and device dies are singulated into multiple packages. Corresponding structures result from these methods.

Semiconductor Package and Method of Manufacturing the Same
20220375826 · 2022-11-24 ·

A method includes forming a set of through-vias in a substrate, the set of through-vias partially penetrating a thickness of the substrate. First connectors are formed over the set of through-vias on a first side of the substrate. The first side of the substrate is attached to a carrier. The substrate is thinned from the second side to expose the set of through-vias. Second connectors are formed over the set of through-vias on the second side of the substrate. A device die is bonded to the second connectors. The substrate is singulated into multiple packages.

Semiconductor package structure having antenna module

A semiconductor package structure having an antenna module includes: a substrate, having a first surface and a second surface; a semiconductor chip, disposed on the first surface; a plastic packaging material layer, formed on the first surface, where the plastic packaging material layer wraps the semiconductor chip and exposes a part of a front surface of the semiconductor chip; a rewiring layer, disposed on the plastic packaging material layer and electrically connected to the semiconductor chip; a metal bump, electrically connected to the rewiring layer; and an antenna module, disposed on the second surface of the substrate.

Semiconductor package and method of fabricating the same

A semiconductor package provided herein includes a first semiconductor die, a second semiconductor die and an insulating encapsulation. The second semiconductor die is stacked on the first semiconductor die. The insulating encapsulation laterally surrounds the first semiconductor die and the second semiconductor die in a one-piece form, and has a first sidewall and a second sidewall respectively adjacent to the first semiconductor die and the second semiconductor die. The first sidewall keeps a lateral distance from the second sidewall.

Semiconductor Devices and Methods of Manufacturing
20220367177 · 2022-11-17 ·

A single layer process is utilized to reduce swing effect interference and reflection during imaging of a photoresist. An anti-reflective additive is added to a photoresist, wherein the anti-reflective additive has a dye portion and a reactive portion. Upon dispensing the reactive portion will react with underlying structures to form an anti-reflective coating between the underlying structure and a remainder of the photoresist. During imaging, the anti-reflective coating will either absorb the energy, preventing it from being reflected, or else modify the optical path of reflection, thereby helping to reduce interference caused by the reflected energy.

HYBRID CARRIER FOR ELECTRONIC SUBSTRATE TECHNOLOGIES

Embodiments disclosed herein include carriers and methods of using the carriers to assemble electronic packages. In an embodiment, a carrier for electronic packaging assembly comprises a mold layer with a first surface and a second surface. In an embodiment, a plurality of glass substrates are embedded in the mold layer. In an embodiment, individual ones of the glass substrates comprise a third surface and a fourth surface, where the third surface of the glass substrate is substantially coplanar with the first surface of the mold layer.

Packages With Multiple Types of Underfill and Method Forming The Same
20220367413 · 2022-11-17 ·

A method includes bonding a first package component over a second package component, dispensing a first underfill between the first package component and the second package component, and bonding a third package component over the second package component. A second underfill is between the third package component and the second package component. The first underfill and the second underfill are different types of underfills.

SUBSTRATE PROCESSING METHOD
20220367272 · 2022-11-17 ·

Provided is a method for processing a substrate having a metal formed on a planned dividing line along the planned dividing line, the method including a processed groove forming step of forming a processed groove in the substrate along the planned dividing line, and a burr removing step of, after the processed groove forming step is performed, making an etchant that includes at least an oxidizing agent and to which an ultrasonic vibration is imparted come into contact with the substrate, suppressing ductility of a metallic burr generated on a periphery of the formed processed groove and increasing fragility of the burr by modifying the burr by the oxidizing agent included in the etchant, and removing the burr by the ultrasonic vibration.

HYBRID BOND METHOD FOR FIXING DIES
20220367232 · 2022-11-17 ·

A hybrid die bonding method includes the following steps: dicing a wafer into a plurality of dies arranged on a plurality of target blocks of a carrier film, wherein surfaces of each of the dies having no solder and bump; cleaning particulate from first surfaces of the dies; separating sides and corners of second surfaces of the dies from the target blocks; turning the carrier film and transferring the dies to a first carrier, wherein the first surfaces of the dies contact the first carrier; removing the carrier film from the second surfaces of the dies; cleaning particulate from the second surfaces of the dies; and transferring the dies from the first carrier to a substrate, wherein a surface of the substrate having no solder and bump. As such, the method reduces the adhesive force between the dies and the carrier film.