Patent classifications
H01L2221/68386
SEMICONDUCTOR ELEMENT AND METHOD FOR MANUFACTURING SEMICONDUCTOR ELEMENT
There is provided a semiconductor element containing gallium nitride. The semiconductor element includes a semiconductor layer including a first surface having a first region and a second region that is a projecting portion having a strip shape and projecting relative to the first region or a recessed portion having a strip shape and being recessed relative to the first region. Of the first surface, at least one of surfaces of the first region and the second region includes a crystal plane having a plane orientation different from a (000-1) plane orientation and a (1-100) plane orientation.
ADHESIVE COMPOSITION, LAMINATE AND METHOD FOR PRODUCING SAME, METHOD FOR PEELING LAMINATE, AND METHOD FOR PROCESSING SEMICONDUCTOR-FORMING SUBSTRATE
The invention provides an adhesive composition containing an adhesive component (S) and a release component (H) formed of a polyorganosiloxane having a complex viscosity of 3,400 (Pa.Math.S) or higher.
DEBONDING STRUCTURES FOR WAFER BONDING
The present disclosure describes a method to form a bonded semiconductor structure. The method includes forming a first bonding layer on a first wafer, forming a debonding structure on a second wafer, forming a second bonding layer on the debonding structure, bonding the first and second wafers with the first and second bonding layers, and debonding the second wafer from the first wafer via the debonding structure. The debonding structure includes a first barrier layer, a second barrier layer, and a water-containing dielectric layer between the first and second barrier layers.
METHOD FOR MANUFACTURING SEMICONDUCTOR ELEMENT, AND SEMICONDUCTOR ELEMENT BODY
A method for manufacturing a semiconductor element according to the present disclosure includes an element layer forming step of forming a semiconductor element layer on a first surface of a ground substrate; a first supporting substrate preparing step of positioning a first supporting substrate that has a third surface and has a bonding material located on the third surface so that the third surface faces the first surface; a pressing step of causing the bonding material to enter a gap between the ground substrate and the semiconductor element layer; and a peeling step of peeling off the first supporting substrate, the bonding material, and the semiconductor element layer from the ground substrate.
Multilayer circuit board manufacturing method
There is a method of manufacturing a multilayer wiring board including: alternately stacking wiring layers and insulating layers; stacking a reinforcing sheet on one surface of the resulting multilayer laminate with a soluble adhesive layer therebetween, wherein an unoccupied region without the soluble adhesive layer is provided within a facing area where the reinforcing sheet faces the multilayer laminate; allowing a liquid capable of dissolving the soluble adhesive layer to infiltrate the unoccupied region to dissolve or soften the soluble adhesive layer; and releasing the reinforcing sheet from the multilayer laminate at the soluble adhesive layer. This method enables the multilayer wiring layer to be reinforced to generate no large local warpage, thereby improving the reliable connection and the surface flatness (coplanarity) of the multilayer wiring layer. The used reinforcing sheet can be released in a significantly short time, while minimizing the stress applied to the multilayer laminate.
Method of manufacturing semiconductor device
A method of manufacturing a semiconductor device, includes: preparing a support substrate having a peeling layer formed on a main surface side; partially forming a wiring layer above the peeling layer; arranging a semiconductor chip on the support substrate so that a pad of the semiconductor chip is electrically connected to the wiring layer; forming an encapsulating layer that encapsulates at least a part of the wiring layer and the semiconductor chip and is in contact with the peeling layer or a layer above the peeling layer so as to form an intermediate laminated body including the semiconductor chip, the wiring layer, and the encapsulating layer on the support substrate; cutting a peripheral portion of the support substrate after forming the intermediate laminated body; and mechanically peeling the intermediate laminated body from the support substrate with the peripheral portion cut away, with the peeling layer being as a boundary.
Method of processing workpiece and resin sheet unit
A method of processing a workpiece includes sticking an adhesive layer side of a resin sheet having a layered structure that includes an adhesive layer and a base material layer, to an annular frame having an opening in covering relation to the opening, forming surface irregularities on a face side of the base material layer that is opposite the adhesive layer, placing the face side of the workpiece and the face side of the base material layer in facing relation to each other and pressing the workpiece against the resin sheet or pressing the resin sheet against the workpiece, thereby bringing the workpiece into intimate contact with the resin sheet to fix the workpiece to the resin sheet, holding the face side of the workpiece fixed to the resin sheet on a holding surface of a chuck table, and grinding the reverse side of the workpiece with a grinding stone.
MODULE
A module includes: a substrate having a first surface and a second surface opposed to each other; a component mounted on the first surface; a sealing resin that covers the first surface and the component; a shield film formed to cover an upper surface and a side surface of the sealing resin and a side surface of the substrate; and a resist film formed to cover the second surface. The resist film has a plurality of protrusions.
DICING DIE ATTACH FILM AND METHOD OF PRODUCING THE SAME, AND SEMICONDUCTOR PACKAGE AND METHOD OF PRODUCING THE SAME
A dicing die attach film including a dicing film and a die attach film laminated on the dicing film, in which the die attach film has an arithmetic average roughness Ra1 of from 0.05 to 2.50 μm at a surface in contact with the dicing film, and a value of ratio of Ra1 to an arithmetic average roughness Ra2 at a surface that is of the die attach film and is opposite to the surface in contact with the dicing film is from 1.05 to 28.00.
DICING DIE ATTACH FILM AND METHOD OF PRODUCING THE SAME, AND SEMICONDUCTOR PACKAGE AND METHOD OF PRODUCING THE SAME
A dicing die attach film including a dicing film and a die attach film laminated on the dicing film, in which the die attach film has an arithmetic average roughness Ra1 of from 0.05 to 2.50 μm at a surface in contact with the dicing film, and a value of ratio of Ra1 to an arithmetic average roughness Ra2 at a surface that is of the die attach film and is opposite to the surface in contact with the dicing film is from 1.05 to 28.00.