Shielded radio-frequency (RF) module having reduced area. In some embodiments, an RF module can include a packaging substrate configured to receive a plurality of components, and a plurality of shielding wirebonds implemented on the packaging substrate and configured to provide RF shielding functionality for one or more regions on the packaging substrate. The packaging substrate can include a first area associated with implementation of each shielding wirebond. The RF module can further include one or more devices mounted on the packaging substrate. The packaging substrate can further include a second area associated with mounting of each of the one or more devices. Each device can be mounted with respect to a corresponding shielding wirebond such that the second area associated with the device overlaps at least partially with the first area associated with the corresponding shielding wirebond.

A semiconductor package component and a semiconductor package including the same. More particularly, the present disclosure relates to a semiconductor package component for an RF power transistor and a semiconductor package including the same. Further particularly, it relates to a semiconductor package component for an RF power transistor and a semiconductor package including the same, capable of adjusting impedance matching of an RF transistor by connecting a die chip and a lead frame with a wire so that a length of the wire is reduced as much as the protruding height of the base substrate.

An amplification device includes a base substrate, an amplification element, and a matching circuit board. The amplification element is mounted on the base substrate. The matching circuit board is mounted on the base substrate and includes a circuit pattern which is electrically connected to the amplification element. The matching circuit board includes a first side surface and a second side surface each extending in the longitudinal direction of the matching circuit board. A first recess is provided in the first side surface. A second recess facing the first recess is provided in the second side surface.

A chip module, including a radio frequency integrated circuit (RFIC) chip and a package, and a method and system for designing the module. Chip and package design are performed so the RF front end (FE) is split between chip and package. The chip includes an amplifier with a first differential port and the package includes a passive device and matching network with a second differential port connected to the first differential port. The second differential port is power matched to the first differential port using complex power matching based on port voltage reflection coefficients in order to achieve improved performance (i.e., a peak power transfer across a bandwidth as opposed to at only one frequency). The power matching process can result in a chip power requirement reduction that allows for device size scaling. Thus, designing the chip and designing the package is iteratively repeated in a chip-package co-optimization process.

A amplifier device includes an amplifier, a coupling circuit, and a filter circuit. The amplifier amplifies a high frequency signal, and outputs to signal output ports the high frequency signal. The coupling circuit is provided side-by-side with the amplifier in a first direction on a substrate, connected to the signal output ports, and configured to couple output signals and output one output signal to an output terminal. The filter circuit is provided on the substrate and connected to the coupling circuit, and configured to reduce third-order IMD included in the one output signal. The one output signal is output from a middle of the substrate in a second direction intersecting with the first direction, and the filter circuit is arranged next to an edge of the substrate in the second direction, and arranged next to an edge of the substrate on the output terminal side in the first direction.

RF transistor amplifiers include an RF transistor amplifier die having a Group III nitride-based semiconductor layer structure and a plurality of gate terminals, a plurality of drain terminals, and at least one source terminal that are each on an upper surface of the semiconductor layer structure, an interconnect structure on an upper surface of the RF transistor amplifier die, and a coupling element between the RF transistor amplifier die and the interconnect structure that electrically connects the gate terminals, the drain terminals and the source terminal to the interconnect structure.

A radio frequency (RF) transistor amplifier package includes a submount, and first and second leads extending from a first side of the submount. The first and second leads are configured to provide RF signal connections to one or more transistor dies on a surface of the submount. At least one rivet is attached to the surface of the submount between the first and second leads on the first side. One or more corners of the first side of the submount may be free of rivets. Related devices and associated RF leads and non-RF leads are also discussed.

A circuit interconnect for high bandwidth and high die-count memory stacks. The circuit interconnect may include a first ground trace, a first signal trace, a second ground trace, and a second signal trace. The first ground trace may reside in a first layer of a multilayer printed circuit board. The first signal trace may be positioned adjacent to the first ground trace within the first layer. The second ground trace may reside within a second layer of the multilayer printed circuit board. The second signal trace may be positioned adjacent to the second ground trace within the second layer.

A packaged radio frequency transistor amplifier includes a package housing, an RF transistor amplifier die that is mounted within the package housing, a first capacitor die that is mounted within the package housing, an input leadframe that extends through the package housing to electrically connect to a gate terminal of the RF transistor amplifier die, and an output leadframe that extends through the package housing to electrically connect to a drain terminal of the RF transistor amplifier die. The output leadframe includes an output pad region, an output lead that extends outside of the package housing, and a first arm that extends from one of the output pad region and the output lead to be adjacent the first capacitor die.

Inductance-capacitance (LC) resonators having different resonant frequencies, and radio frequency (RF) transistor amplifiers including the same. One usage of such LC resonators is to implement RF short/DC block circuits. A RF transistor amplifier may include a transistor on a base of the RF transistor amplifier coupled to an input and an output of the RF transistor amplifier; a first inductance-capacitance (LC) resonator comprising a first inductance and a first capacitance; and a second LC resonator comprising a second inductance and a second capacitance. The first LC resonator may be configured to resonate at a first frequency, and the second LC resonator may be configured to resonate at a second frequency different from the first frequency.