The present disclosure relates to an interposer. The interposer includes: a support body formed of a ceramic material, a connection electrode configured to the top surface and bottom surface of the support body, and a shielding member disposed at an outer surface of the support body. At least a part of the support body is disposed along the edge of a substrate, and electrically connects the substrate and a substrate. The interposer is formed of a ceramic material and thus make it possible to implement a fine pattern, to improve dimensional stability by preventing the bending deformation of ceramic green sheets, and to raise the reliability of signal transmission. Therefore, the interposer can contribute to implementing high performance of an electronic device and reducing the size of the electronic device.

A number of monolithic diode limiter semiconductor structures are described. The diode limiters can include a hybrid arrangement of diodes with different intrinsic regions, all formed over the same semiconductor substrate. In one example, a method of manufacture of a monolithic diode limiter includes providing an N-type semiconductor substrate, providing an intrinsic layer on the N-type semiconductor substrate, implanting a first P-type region to a first depth into the intrinsic layer, implanting a second P-type region to a second depth into the intrinsic layer, and forming at least one passive circuit element over the intrinsic layer. The method can also include forming an insulating layer on the intrinsic layer, forming a first opening in the insulating layer, and forming a second opening in the insulating layer. The method can also include implanting the first P-type region through the first opening and implanting the second P-type region through the second opening.

In various embodiments, a bonded structure is disclosed. The bonded structure can include an element and a passive electronic component having a first surface bonded to the element and a second surface opposite the first surface. The passive electronic component can comprise a first anode terminal bonded to a corresponding second anode terminal of the element and a first cathode terminal bonded to a corresponding second cathode terminal of the element. The first anode terminal and the first cathode terminal can be disposed on the first surface of the passive electronic component.

A high-frequency device includes a metal base, a dielectric substrate mounted on the metal base, an insulator layer provided on the metal base, covering the dielectric substrate, and having a dielectric constant smaller than that of the dielectric substrate, and a first line that overlaps the dielectric substrate as seen from a thickness direction of the insulator layer and is provided on an upper surface of the insulator layer to form a first microstrip line.

Novel tools and techniques are provided for implementing cantilevered power planes to provide a return current path for high-speed signals. In various embodiments, a semiconductor package includes a substrate core, a plurality of layers, and an AC coupler(s). The plurality of layers includes power, ground, and signal layers each layer disposed on or above the substrate core, each signal layer being disposed between a power layer and a ground layer, the power layer and the ground layer each providing a return path for high frequency (e.g., 1 kHz or greater) signals carried by each signal layer. Each dielectric layer is disposed between and in contact with a pair of power, ground, or signal layer. The AC coupler(s) is coupled to each of a power layer(s) and a ground layer(s), without any portion of any power layer that is near an edge of the substrate core being anchored to the substrate core.

A package substrate is disclosed. The package substrate includes a die package in the package substrate located at least partially underneath a location of a power delivery interface in a die that is coupled to the surface of the package substrate. Connection terminals are accessible on a surface of the die package to provide connection to the die that is coupled to the surface of the package substrate. Metal-insulator-metal layers inside the die package are coupled to the connection terminals.

A radio frequency front end module is provided which includes a first filter module disposed on a substrate, a second filter module disposed on the substrate, a resin casing disposed on the substrate and encapsulating the first and second filter modules, and a radio frequency shield disposed between the first and second filter module, wherein the shield comprises a plurality of vias formed in the resin casing and extending perpendicular to the substrate of the front end module, a method of reducing coupling between two filters on a multi-chip front end module having a resin encapsulation is also provided which includes disposing a plurality of vias in the resin encapsulation between the two filters.

An electronic package includes a package substrate of a rectangular shape, and a chip package including a first interface circuit die and a second interface circuit die. The first interface circuit die and second interface circuit die are mounted on a redistribution layer structure and encapsulated within a molding compound. The chip package is mounted on a top surface of the package substrate and rotated relative to the package substrate above a vertical axis that is orthogonal to the top surface through a rotation offset angle. A metal ring is mounted on the top surface of the package substrate.

The increasing power density and, therefore, current consumption of high performance integrated circuits (ICs) results in increased challenges in the design of a reliable and efficient on-chip power delivery network. In particular, meeting the stringent on-chip impedance of the IC requires circuit and system techniques to mitigate high frequency noise that results due to resonance between the package inductance and the onchip capacitance. In this paper, a novel circuit technique is proposed to suppress high frequency noise through the use of a hyperabrupt junction tuning varactor diode as a decoupling capacitor for noise critical functional blocks. With the proposed circuit technique, the voltage droops and overshoots on the onchip power distribution network are suppressed by up to 60% as compared to MIM or deep trench decoupling capacitors of the same capacitance. In addition, there is no added latency to react to power supply noise and there is no degradation to circuit performance as compared to existing techniques in commercial products and literature.

A radio frequency amplifier includes a transistor, an input impedance matching circuit (e.g., a single-section T-match circuit or a multiple-section bandpass circuit), and a fractional harmonic resonator circuit. The input impedance matching circuit is coupled between an amplification path input and a transistor input terminal. An input of the fractional harmonic resonator circuit is coupled to the amplification path input, and an output of fractional harmonic resonator circuit is coupled to the transistor input terminal. The fractional harmonic resonator circuit is configured to resonate at a resonant frequency that is between a fundamental frequency of operation of the RF amplifier and a second harmonic of the fundamental frequency. According to a further embodiment, the fractional harmonic resonator circuit resonates at a fraction, x, of the fundamental frequency, wherein the fraction is between about 1.25 and about 1.9 (e.g., x≈1.5).