Patent classifications
H01L2223/6677
SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF MANUFACTURING THE SAME
The present disclosure provides a semiconductor device package including a substrate, a waveguide component, and an antenna pattern. The substrate includes a feeding element. The waveguide component is disposed over the substrate. The antenna pattern is disposed over the substrate. The waveguide component is substantially aligned with the feeding element and the antenna pattern.
Antenna apparatus and method
An antenna apparatus comprises a semiconductor die in a molding compound layer, a first through via is between a sidewall of the semiconductor die and a sidewall of the molding compound layer and an antenna structure over the molding compound layer, wherein a first portion of the antenna structure is directly over a top surface of the semiconductor die and a second portion of the antenna structure is directly over a top surface of the first through via.
System on integrated chips and methods of forming the same
A semiconductor device and methods of forming are provided. The device includes a second die bonded to a first die and a third die bonded to the first die. An isolation material extends along sidewalls of the second die and the third die. A through via extends from the first die into the isolation material. A first passive device disposed in the isolation material, the first passive device being electrically connected to the first die.
Radio frequency module and communication device
A radio frequency module includes a first substrate having a first principal surface and a second principal surface on the opposite side to the first principal surface; a signal terminal which is provided on the first principal surface and through which a signal is transmitted to and received from an external circuit; a power supply terminal that is provided on the second principal surface and is supplied with a power supply signal; an antenna; and a radio frequency electronic component that is electrically connected to the signal terminal, the power supply terminal and the antenna, and controls transmission and reception of the antenna based on the signal and the power supply signal.
Heterogeneous antenna in fan-out package
A method includes bonding an antenna substrate to a redistribution structure. The antenna substrate has a first part of a first antenna, and the redistribution structure has a second part of the first antenna. The method further includes encapsulating the antenna substrate in an encapsulant, and bonding a package component to the redistribution structure. The redistribution structure includes a third part of a second antenna, and the package component includes a fourth part of the second antenna.
Through-substrate waveguide
Embodiments may relate to a semiconductor package that includes a die and a package substrate. The package substrate may include one or more cavities that go through the package substrate from a first side of the package substrate that faces the die to a second side of the package substrate opposite the first side. The semiconductor package may further include a waveguide communicatively coupled with the die. The waveguide may extend through one of the one or more cavities such that the waveguide protrudes from the second side of the package substrate. Other embodiments may be described or claimed.
Electromagnetic pulse detection
An embodiment integrated circuit includes a first electromagnetic pulse detection device that comprises a first loop antenna formed in an interconnection structure of the integrated circuit, a first end of the first antenna being connected to a first node of application of a power supply potential and a second end of the antenna being coupled to a second node of application of the power supply potential, and a first circuit connected to the second end of the first antenna and configured to output a first signal representative of a comparison of a first current in the first antenna with a first threshold.
Metallization barrier structures for bonded integrated circuit interfaces
Composite integrated circuit (IC) device structures that include two components coupled through a hybrid bonded composite interconnect structure. The two components may be two different monolithic IC structures (e.g., chips) that are bonded over substantially planar dielectric and metallization interfaces. Composite interconnect metallization features formed at a bond interface may be doped with a metal or chalcogenide dopant. The dopant may migrate to a periphery of the composite interconnect structure and form a barrier material that will then limit outdiffusion of a metal, such as copper, into adjacent dielectric material.
ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF
An electronic package is provided, where a laterally diffused metal oxide semiconductor (LDMOS) type electronic structure is mounted onto a complementary metal oxide semiconductor (CMOS) type electronic element to be integrated into a chip module, thereby shortening electrical transmission path between the electronic structure and the electronic element so as to reduce the communication time between the electronic structure and the electronic element.
Module and electronic apparatus
A module of an embodiment of the present disclosure includes a first substrate including a first wiring pattern and a second substrate having a second wiring pattern with a wiring density different from that of the first wiring pattern, in which the second substrate is bonded to the first substrate. At least one of the first substrate or the second substrate has visible light transmittance.