In one implementation a cathode for electrochemical metal removal has a generally disc-shaped body and a plurality of channels in the generally disc-shaped body, where the channels are configured for passing electrolyte through the body of the cathode. The channels may be fitted with non-conductive (e.g., plastic) tubes that in some embodiments extend above the body of the cathode to a height of at least 1 cm. The cathode may also include a plurality of indentations at the edge to facilitate electrolyte flow at the edge of the cathode. In some embodiments the cathode includes a plurality of non-conductive fixation elements on a conductive surface of the cathode, where the fixation elements are attachable to one or more handles for removing the cathode from the electrochemical metal removal apparatus.

A semiconductor package according to an embodiment includes a semiconductor chip having a first surface in which a chip pad is formed, a first insulating layer arranged on the first surface of the semiconductor chip and including a first filler, a first conductive via electrically connected to the chip pad and formed to penetrate the first insulating layer, a redistribution pattern electrically connected to the first conductive via and buried in the first insulating layer, a second insulating layer contacting the redistribution pattern on the first insulating layer and including a second filler, a second conductive via electrically connected to the redistribution pattern and formed to penetrate the second insulating layer, an under bump material (UBM) electrically connected to the second conductive via and buried in the second insulating layer, and an external connection terminal electrically connected to the UBM.

Aspects of the embodiments include a semiconductor package that includes a printed circuit board (PCB) and a semiconductor die. The semiconductor die including an interconnect landing pad on an active side of the semiconductor die; a solder material on the interconnect landing pad; a partial redistribution layer on the active side of the semiconductor die; and a protection layer on the partial redistribution layer, the protection layer comprising the solder material. The semiconductor die is electrically connected to the PCB by the solder material on the interconnect landing pad. The partial redistribution layer and the protection layer are separated from the printed circuit board by an air gap.

A method of manufacturing a semiconductor device includes providing a semiconductor substrate having a top surface, on which has been formed a color filter and a micro-lens, and a bottom surface opposite to the top surface, forming a redistribution line on the bottom surface of the semiconductor substrate, and forming on the bottom surface of the semiconductor substrate a passivation layer covering the redistribution line. After the redistribution line and passivation layer are formed, an oxide layer between the redistribution line and the passivation is formed at a temperature that avoids thermal damage to the color filter and the micro-lens.

A microelectronic device is formed by forming a seed layer that contains primarily zinc. A plating mask is formed over the seed layer, and a copper strike layer is formed on the seed layer using a neutral pH copper plating bath. A main copper layer is formed on the copper strike layer by plating copper on the copper strike layer. The plating mask is subsequently removed. The main copper layer, the copper strike layer, and the seed layer are heated to diffuse copper and zinc, and form a brass layer under the main copper layer, consuming the seed layer between the main copper layer and the substrate. Remaining portions of the seed layer are removed by a wet etch process. The main copper layer and the underlying brass layer provide a conductor structure.

Methods of curing a polymer layer on a substrate using variable microwave frequency are provided herein. In some embodiments, methods of curing a polymer layer on a substrate using variable microwave frequency include (a) forming a first thin-film polymer layer on a substrate, the first thin-film polymer layer including at least one first base dielectric material and at least one microwave tunable material, (b) applying a variable frequency microwave energy to the substrate and the first thin-film polymer layer to heat the substrate and the first thin-film polymer layer to a first temperature, and (c) adjusting the variable frequency microwave energy applied to the substrate and the first thin-film polymer layer to tune at least one material property of the first thin-film polymer layer.

A method includes forming a first dielectric layer over a conductive pad, forming a second dielectric layer over the first dielectric layer, and etching the second dielectric layer to form a first opening, with a top surface of the first dielectric layer exposed to the first opening. A template layer is formed to fill the first opening. A second opening is then formed in the template layer and the first dielectric layer, with a top surface of the conductive pad exposed to the second opening. A conductive pillar is formed in the second opening.

A method of manufacturing a semiconducor device includes providing a semiconductor substrate having a top surface, on which has been formed a color filter and a micro-lens, and a bottom surface opposite to the top surface, forming a redistribution line on the bottom surface of the semiconductor substrate, and forming on the bottom surface of the semiconductor substrate a passivation layer covering the redistribution line. After the redistribution line and passivation layer are formed, an oxide layer between the redistribution line and the passivation is formed at a temperature that avoids thermal damage to the color filter and the micro-lens.

An electronic component including a pad electrode provided on a wiring electrode and a Au bump provided on the pad electrode, wherein the uppermost layer of the wiring electrode is a first Ti layer, the uppermost layer of the pad electrode is a Au layer, and the thickness of the first Ti layer in at least a portion on which the Au bump is superposed in plan view is greater than the thickness of at least a portion of the first Ti layer in a portion on which the Au bump is not superposed in plan view.

An electronic component including a pad electrode provided on a wiring electrode and a Au bump provided on the pad electrode, wherein the uppermost layer of the wiring electrode is a first Ti layer, the uppermost layer of the pad electrode is a Au layer, and the thickness of the first Ti layer in at least a portion on which the Au bump is superposed in plan view is greater than the thickness of at least a portion of the first Ti layer in a portion on which the Au bump is not superposed in plan view.