A semiconductor device is provided that includes a bond pad, an insulating layer, and a bonding structure. The bond pad is in a dielectric layer and the insulating layer is over the bond pad; the insulating layer having an opening over the bond pad formed therein. The bonding structure electrically couples the bond pad in the opening. The bonding structure has a height that at least extends to an upper surface of the insulating layer.

A bonded structure is disclosed. The bonded structure can include a first element that includes a first conductive feature and a first nonconductive region. The first conductive feature can include a fine grain metal that has an average grain size of 500 nm or less. The bonded structure can include a second element that includes a second conductive feature and a second nonconductive region. The first conductive feature is directly bonded to the second conductive feature without an intervening adhesive, and the second nonconductive region is directly bonded to the second nonconductive region without an intervening adhesive.

A substrate structure, a semiconductor package structure including the same and a method for manufacturing the same are provided. The substrate structure includes a first passivation layer, a first circuit layer and a first protection layer. The first passivation layer has a first surface and a second surface opposite to the first surface. The first circuit layer has an outer lateral surface. A first portion of the first circuit layer is disposed in the first passivation layer. The first protection layer is disposed on a second portion of the first circuit layer and exposed from the first surface of the first passivation layer. The outer lateral surface of the first circuit layer is covered by the first passivation layer or the first protection layer.

A semiconductor device of the present invention includes a first main electrode and a second main electrode respectively disposed on a first main surface and a second main surface of a semiconductor substrate, a protective film disposed on an edge part of the first main electrode; and a first metal film disposed in a region enclosed by the protective film on the first main electrode. The first metal film has a film thickness at a central portion larger than that at a part in contact with the protective film, and has irregularities on a surface thereof.

The present technology is directed to manufacturing collars for under-bump metal (UBM) structures for die-to-die and/or package-to-package interconnects and associated systems. A semiconductor die includes a semiconductor material having solid-state components and an interconnect extending at least partially through the semiconductor material. An under-bump metal (UBM) structure is formed over the semiconductor material and is electrically coupled to corresponding interconnects. A collar surrounds at least a portion of the side surface of the UBM structure, and a solder material is disposed over the top surface of the UBM structure.

Semiconductor dies having interconnect structures formed thereon, and associated systems and methods, are disclosed herein. In one embodiment, an interconnect structure includes a conductive material electrically coupled to an electrically conductive contact of a semiconductor die. The conductive material includes a first portion vertically aligned with the conductive contact, and a second portion that extends laterally away from the conductive contact. A solder material is disposed on the second portion of the interconnect structure such that the solder material is at least partially laterally offset from the conductive contact of the semiconductor die. In some embodiments, an interconnect structure can further include a containment layer that prevents wicking or other undesirable movement of the solder material during a reflow process.

Apparatus and associated methods relate to a bond-pad structure having small pad-substrate capacitance for use in high-voltage MOSFETs. The bond-pad structure includes upper and lower polysilicon plates interposed between a metal bonding pad and an underlying semiconductor substrate. The lower polysilicon plate is encapsulated in dielectric materials, thereby rendering it floating. The upper polysilicon plate is conductively coupled to a source of the high-voltage MOSFET. A perimeter of the metal bonding pad is substantially circumscribed, as viewed from a plan view perspective, by a perimeter of the upper polysilicon plate. A perimeter of the upper polysilicon plate is substantially circumscribed, as viewed from the plan view perspective, by a perimeter of the lower polysilicon plate. In some embodiments, the metal bonding pad is conductively coupled to a gate of the high-voltage MOSFET. The pad-substrate capacitance is advantageously made small by this bond-pad structure.

The present technology is directed to manufacturing collars for under-bump metal (UBM) structures for die-to-die and/or package-to-package interconnects and associated systems. A semiconductor die includes a semiconductor material having solid-state components and an interconnect extending at least partially through the semiconductor material. An under-bump metal (UBM) structure is formed over the semiconductor material and is electrically coupled to corresponding interconnects. A collar surrounds at least a portion of the side surface of the UBM structure, and a solder material is disposed over the top surface of the UBM structure.

A substrate wafer arrangement includes a substrate layer having a first main side and a second main side opposite the first main side, the first main side being a front-side and the second main side being a back-side, the substrate layer further having a plurality of semiconductor chips. A polymer structure arranged between the plurality of semiconductor chips extends at least from the front-side of the substrate layer to the back-side of the substrate layer and protrudes from a back-side surface of the substrate layer. The polymer structure separates a plurality of insular islands of conductive material, each insular island corresponding to a respective semiconductor chip of the plurality of semiconductor chips. Semiconductor devices produced from the substrate wafer arrangement are also described.

A wire bonding structure and a method of manufacturing the same are provided. The wire bonding structure includes a bonding pad structure, a protection layer and a bonding wire. The bonding pad structure includes a bonding pad and a conductive layer. The bonding pad has an opening. The conductive layer is electrically connected to the bonding pad. At least a portion of the conductive layer is located in the opening of the bonding pad and laterally surrounded by the bonding pad. The protection layer at least covers a portion of a surface of the bonding pad structure. The bonding wire is bonded to the conductive layer of the bonding pad structure.