In an embodiment a semiconductor component includes a laterally extending contact area laterally interrupted in such a way that material of the contact area laterally delimits at least one recess, the contact area configured to be at a potential, wherein at least one first recess is formed laterally as a circular ring around a lateral center point of the contact area, and wherein at least one second recess extends laterally in a straight line through the lateral center point of the contact area so that the contact area is divided by a corresponding recess into two halves which are not connected by material of the contact area.

In an embodiment a semiconductor component includes a laterally extending contact area laterally interrupted in such a way that material of the contact area laterally delimits at least one recess, the contact area configured to be at a potential, wherein at least one first recess is formed laterally as a circular ring around a lateral center point of the contact area, and wherein at least one second recess extends laterally in a straight line through the lateral center point of the contact area so that the contact area is divided by a corresponding recess into two halves which are not connected by material of the contact area.

A pad structure adapted to be disposed on a first package substrate and electrically connected to conductive contacts of a second package substrate includes a first conductive pad having a first top surface, a second conductive pad, a first leveling conductor and a second leveling conductor. The second conductive pad disposed aside the first conductive pad has a second top surface non-coplanar with the first top surface. The first leveling conductor disposed on the first conductive pad has a first leveling surface opposite to the first top surface. The second leveling conductor disposed on the second conductive pad and having a second leveling surface opposite to the second top surface is coplanar with the first leveling surface. The conductive contacts of the second package substrate are disposed on the first leveling conductor and the second leveling conductor. A manufacturing method of a pad structure is also provided.

A method of fabricating a semiconductor package includes providing a substrate having at least one contact and forming a redistribution layer on the substrate. The formation of the redistribution layer includes forming a dielectric material layer over the substrate and performing a double exposure process to the dielectric material layer. A development process is then performed and a dual damascene opening is formed in the dielectric material layer. A seed metallic layer is formed over the dual damascene opening and over the dielectric material layer. A metal layer is formed over the seed metallic layer. A redistribution pattern is formed in the first dual damascene opening and is electrically connected with the at least one contact.

A method of fabricating a semiconductor package includes providing a substrate having at least one contact and forming a redistribution layer on the substrate. The formation of the redistribution layer includes forming a dielectric material layer over the substrate and performing a double exposure process to the dielectric material layer. A development process is then performed and a dual damascene opening is formed in the dielectric material layer. A seed metallic layer is formed over the dual damascene opening and over the dielectric material layer. A metal layer is formed over the seed metallic layer. A redistribution pattern is formed in the first dual damascene opening and is electrically connected with the at least one contact.

A solid-state image pickup device capable of suppressing the generation of dark current and/or leakage current is provided. The solid-state image pickup device has a first substrate provided with a photoelectric converter on its primary face, a first wiring structure having a first bonding portion which contains a conductive material, a second substrate provided with a part of a peripheral circuit on its primary face, and a second wiring structure having a second bonding portion which contains a conductive material. In addition, the first bonding portion and the second bonding portion are bonded so that the first substrate, the first wiring structure, the second wiring structure, and the second substrate are disposed in this order. Furthermore, the conductive material of the first bonding portion and the conductive material of the second bonding portion are surrounded with diffusion preventing films.

A semiconductor device including a substrate, an insulating, layer on the substrate and including a trench, at least one via structure penetrating the substrate and protruding above a bottom surface of the trench, and a conductive structure surrounding the at least one via structure in the trench may be provided.

A semiconductor device including a substrate, an insulating, layer on the substrate and including a trench, at least one via structure penetrating the substrate and protruding above a bottom surface of the trench, and a conductive structure surrounding the at least one via structure in the trench may be provided.

Capacitive coupling of integrated circuit die components and other conductive areas is provided. Each component to be coupled has a surface that includes at least one conductive area, such as a metal pad or plate. An ultrathin layer of dielectric is formed on at least one surface to be coupled. When the two components, e.g., one from each die, are permanently contacted together, the ultrathin layer of dielectric remains between the two surfaces, forming a capacitor or capacitive interface between the conductive areas of each respective component. The ultrathin layer of dielectric may be composed of multiple layers of various dielectrics, but in one implementation, the overall thickness is less than approximately 50 nanometers. The capacitance per unit area of the capacitive interface formed depends on the particular dielectric constants of the dielectric materials employed in the ultrathin layer and their respective thicknesses. Electrical and grounding connections can be made at the edge of the coupled stack.

A solid-state image pickup device capable of suppressing the generation of dark current and/or leakage current is provided. The solid-state image pickup device has a first substrate provided with a photoelectric converter on its primary face, a first wiring structure having a first bonding portion which contains a conductive material, a second substrate provided with a part of a peripheral circuit on its primary face, and a second wiring structure having a second bonding portion which contains a conductive material. In addition, the first bonding portion and the second bonding portion are bonded so that the first substrate, the first wiring structure, the second wiring structure, and the second substrate are disposed in this order. Furthermore, the conductive material of the first bonding portion and the conductive material of the second bonding portion are surrounded with diffusion preventing films.