A light-emitting device includes: a light-emitting element; a coating member that covers the light-emitting element; and two external connection electrodes exposed form a first surface of the coating member. Each of the external connection electrodes includes an electrode buried in the coating member; and a metal layer formed on the electrode. A surface of each of the metal layers is exposed from the first surface of the coating member. The first surface of the coating member includes a plurality of grooves between the external connection electrodes.

The present invention relates to an optoelectronic device comprising: (a) a substrate comprising at least one first electrode, which at least one first electrode comprises a first electrode material, and at least one second electrode, which at least one second electrode comprises a second electrode material; and (b) a photoactive material disposed on the substrate, which photoactive material is in contact with the at least one first electrode and the at least one second electrode, wherein the substrate comprises: a layer of the first electrode material; and, disposed on the layer of the first electrode material, a layer of an insulating material, which layer of an insulating material partially covers the layer of the first electrode material; and, disposed on the layer of the insulating material, the second electrode material, and wherein the photoactive material comprises a crystalline compound, which crystalline compound comprises: one or more first cations selected from metal or metalloid cations; one or more second cations selected from Cs.sup.+RB.sup.+, K.sup.+, NH.sup.4 + and organic cations; and one or more halide or chalcogenide anions. A substrate comprising a first and second electrode and processes are also described.

This disclosure is related to integrating optoelectronics microdevices into a system substrate for efficient and durable electrical bonding between two substrates at low temperature. 2D nanostructures and 3D scaffolds may create interlocking structures for improved bonding properties. Addition of nanoparticles into the structure creates high surface area for better conduction. Application of curing agents before or after alignment of micro devices and receiving substrates further assists with formation of strong bonds.

A light-emitting device includes: a light-emitting element; a coating member that covers the light-emitting element; and two external connection electrodes exposed form a first surface of the coating member. Each of the external connection electrodes includes an electrode buried in the coating member; and a metal layer formed on the electrode. A surface of each of the metal layers is exposed from the first surface of the coating member. The first surface of the coating member includes a plurality of grooves between the external connection electrodes.

A metal coating method includes forming a metal layer on a substrate including a first member and a second member, the second member having a lower thermal conductivity than a thermal conductivity of the first member, and irradiating the metal layer formed on the first member and the second member with a laser beam such that, after irradiation, the metal layer formed on the first member remains, and the metal layer formed on the second member is removed.

There is provided a semiconductor package including a first semiconductor chip having lower connection pads provided on a lower surface thereof, and upper connection pads provided on an upper surface thereof and electrically connected to the lower connection pads, and at least one second semiconductor chip provided on the first semiconductor chip in a vertical direction, and having lower pads provided on a lower surface thereof and directly bonded to the upper connection pads of the first semiconductor chip, upper pads provided on the upper surface thereof, and through-silicon vias electrically connecting the lower pads and the upper pads. The at least one second semiconductor chip includes a semiconductor substrate having a first width and a device layer having a second width, smaller than the first width.

A lamination structure including a substrate, a first metal pattern layer, a molding layer and a second metal pattern layer. The first metal pattern layer is formed on the substrate. At least a part of the molding layer and the first metal pattern layer are located on a layer. The second metal pattern layer is formed on the first metal pattern layer and has an opening pattern exposing the molding layer. The second metal pattern layer has a top part and a bottom part that are opposite to each other. The top part and the bottom part each have a rounded corner on an edge adjacent to the opening pattern.

An electronic device is disclosed. The electronic device includes a semiconductor structure, an insulation layer and a circuit structure. The semiconductor structure includes a connection pad including a first portion and a second portion, and the first portion is connected to the second portion. The insulation layer is disposed on the semiconductor structure and includes an opening, and the opening exposes the first portion of the connection pad. The circuit structure is disposed on the insulation layer and includes a conductive layer, and the conductive layer is disposed in the opening and overlapped with the first portion of the connection pad. The first portion of the connection pad has a first thickness, the second portion of the connection pad has a second thickness, and a ratio of the second thickness to the first thickness is greater than or equal to 1 and less than or equal to 1.3.

A semiconductor structure is provided. The semiconductor structure includes an interconnection structure, a first conductive pad, a second conductive pad, a conductive material and a conductive coil. The first and second conductive pads are disposed over and electrically connected to the interconnection structure individually. The conductive material is electrically isolated from the interconnection structure, wherein bottom surfaces of the conductive material, the first conductive pad and the second conductive pad are substantially aligned. The conductive coil is disposed in the interconnection structure and overlapped by the conductive material. A manufacturing method of a semiconductor structure is also provided.

A semiconductor package includes a through electrode within a substrate. A wiring structure is disposed on the substrate and includes a chip pad and a protective insulating layer. A protrusion pattern is disposed on the protective insulating layer. A front bonding insulating layer is disposed on the wiring structure. The protrusion pattern is disposed within the front bonding insulating layer. A front bonding pad is disposed within the front bonding insulating layer and is connected to the chip pad.