A molded semiconductor package includes a mold compound having opposing first and second main surfaces and an edge extending between the first and second main surfaces. A semiconductor die is embedded in the mold compound. A plurality of metal pads embedded in the mold compound are electrically connected to the semiconductor die. The metal pads have a bottom face which is uncovered by the mold compound at the second main surface of the mold compound. The metal pads disposed around a periphery of the molded package have a side face which is uncovered by the mold compound at the edge of the mold compound. The faces of the metal pads uncovered by the mold compound are plated. The side face of each metal pad disposed around the periphery of the molded package is recessed inward from the edge of the mold compound. A corresponding manufacturing method is also described.

A device includes a first chip having a first circuit element, a first interconnect pad in electrical contact with the first circuit element, and a barrier layer on the first interconnect pad, a superconducting bump bond on the barrier layer, and a second chip joined to the first chip by the superconducting bump bond, the second chip having a first quantum circuit element, in which the superconducting bump bond provides an electrical connection between the first circuit element and the first quantum circuit element.

A device includes a first chip having a first circuit element, a first interconnect pad in electrical contact with the first circuit element, and a barrier layer on the first interconnect pad, a superconducting bump bond on the barrier layer, and a second chip joined to the first chip by the superconducting bump bond, the second chip having a first quantum circuit element, in which the superconducting bump bond provides an electrical connection between the first circuit element and the first quantum circuit element.

Describes are shutter disks comprising one or more of titanium (Ti), barium (Ba), or cerium (Ce) for physical vapor deposition (PVD) that allows pasting to minimize outgassing and control defects during etching of a substrate. The shutter disks incorporate getter materials that are highly selective to reactive gas molecules, including O.sub.2, CO, CO.sub.2, and water.

Describes are shutter disks comprising one or more of titanium (Ti), barium (Ba), or cerium (Ce) for physical vapor deposition (PVD) that allows pasting to minimize outgassing and control defects during etching of a substrate. The shutter disks incorporate getter materials that are highly selective to reactive gas molecules, including O.sub.2, CO, CO.sub.2, and water.

Methods and apparatus for processing a substrate are provided herein. For example, a method for processing a substrate can includes selectively etching from a substrate disposed in the PVD chamber an exposed first layer of material, covering an underlying second layer of material, and adjacent to an exposed third layer of material, using both process gas ions and metal ions formed from a target of the PVD chamber, in an amount sufficient to expose the second layer of material while simultaneously depositing a layer of metal onto the third layer of material; and subsequently depositing metal from the target onto the second layer of material.

Methods and apparatus for processing a substrate are provided herein. For example, a method for processing a substrate can includes selectively etching from a substrate disposed in the PVD chamber an exposed first layer of material, covering an underlying second layer of material, and adjacent to an exposed third layer of material, using both process gas ions and metal ions formed from a target of the PVD chamber, in an amount sufficient to expose the second layer of material while simultaneously depositing a layer of metal onto the third layer of material; and subsequently depositing metal from the target onto the second layer of material.

A semiconductor device includes a first semiconductor substrate and a second semiconductor substrate. The first semiconductor substrate includes a first base, a first bonding layer and a first conductive contact. The first bonding layer has a first through via. The first conductive contact is formed within the first through via. The second semiconductor substrate includes a second base, a second bonding layer and a second conductive contact. The second bonding layer has a second through via. The second conductive contact is formed within the second through via. The first conductive contact is electrically connected to the second conductive contact, and the first bonding layer and the second bonding layer are in direct contact with each other.

A device (100) includes a first chip (104) having a first circuit element (112), a first interconnect pad (116) in electrical contact (118) with the first circuit element, and a barrier layer (120) on the first interconnect pad, a superconducting bump bond (106) on the barrier layer, and a second chip (102) joined to the first chip by the superconducting bump bond, the second chip having a quantum circuit element (108), in which the superconducting bump bond provides an electrical connection between the first circuit element and the quantum circuit element.

A process for producing an electrical contact with a first metal layer and at least one second metal layer on a silicon carbide substrate includes removing at least some of the carbon residue by a chemical cleaning process, to clean the first metal layer. The first metal layer and/or the at least one second metal layer may be generated by sputtering deposition.