A semiconductor device including: a semiconductor element; and a first electrode formed on a first surface of the semiconductor element. The first electrode has a stacked structure including a first electroless Ni plating layer. The first electroless Ni plating layer contains nickel (Ni) and phosphorus (P) as a composition. A phosphorus (P) concentration of the first electroless Ni plating layer is 2.5 wt % to 6 wt % inclusive, and a crystallization rate of Ni.sub.3P in the first electroless Ni plating layer is 0% to 20% inclusive.

A semiconductor device including: a semiconductor element; and a first electrode formed on a first surface of the semiconductor element. The first electrode has a stacked structure including a first electroless Ni plating layer. The first electroless Ni plating layer contains nickel (Ni) and phosphorus (P) as a composition. A phosphorus (P) concentration of the first electroless Ni plating layer is 2.5 wt % to 6 wt % inclusive, and a crystallization rate of Ni.sub.3P in the first electroless Ni plating layer is 0% to 20% inclusive.

A thin stacked semiconductor device has a plurality of circuits that are laminated and formed sequentially in a specified pattern to form a multilayer wiring part. At the stage for forming the multilayer wiring part, a filling electrode is formed on the semiconductor substrate such that the surface is covered with an insulating film, a post electrode is formed on specified wiring at the multilayer wiring part, a first insulating layer is formed on one surface of the semiconductor substrate, the surface of the first insulating layer is removed by a specified thickness to expose the post electrode, and the other surface of the semiconductor substrate is ground to expose the filling electrode and to form a through-type electrode. A second insulating layer is formed on one surface of the semiconductor substrate while exposing the forward end of the through-type electrode, and bump electrodes are formed on both electrodes.

A method of testing a semiconductor device includes providing a first wafer that includes a first surface, a second surface that is allocated at an opposite side of the first surface, a first electrode penetrating the first wafer from the first surface to the second surface, and a pad formed on the first surface and coupled electrically with the first electrode, providing a second wafer that includes a second electrode penetrating the second wafer, stacking the first wafer onto the second wafer to connect the first electrode with the second electrode such that the second surface of the first wafer faces the second wafer, probing a needle to the pad, and supplying, in such a state that the first wafer is stacked on the second wafer, a test signal to the first electrode to input the test signal into the second wafer via the first electrode and the second electrode.

A semiconductor device includes a wiring board, a semiconductor chip, and a connecting member provided between a surface of the wiring board and a functional surface of the semiconductor chip. The connecting member extends a distance between the wiring board surface and the functional surface. A sealing material seals a gap space between the wiring board and the semiconductor chip. An electrode is formed at the wiring board surface and arranged outside of an outer periphery of the sealing material. A lateral distance between an outer periphery of the semiconductor chip and the outer periphery of the sealing material is between 0.1 mm and a lateral distance from the outer periphery of the semiconductor chip to the electrode.

This disclosure relates to embodiments that include an apparatus that may comprise a first layer including a first plurality of active devices, a second layer including a second plurality of active devices, and/or a third layer including a plurality of passive devices and disposed between the first and the second layers. An active device of the first plurality of active devices and an active device of the second plurality of active devices may influence a state of charge of a passive device of the plurality of passive devices.

A semiconductor device includes a wiring board, a semiconductor chip, and a connecting member provided between a surface of the wiring board and a functional surface of the semiconductor chip. The connecting member extends a distance between the wiring board surface and the functional surface. A sealing material seals a gap space between the wiring board and the semiconductor chip. An electrode is formed at the wiring board surface and arranged outside of an outer periphery of the sealing material. A lateral distance between an outer periphery of the semiconductor chip and the outer periphery of the sealing material is between 0.1 mm and a lateral distance from the outer periphery of the semiconductor chip to the electrode.

According to some embodiments, a semiconductor device includes a semiconductor substrate, a metal portion, a first insulating film, and a second insulating film. The semiconductor substrate has a through-hole extending from a first surface of the semiconductor substrate to a second surface thereof opposite to the first surface. The metal portion is formed in the through-hole. The first insulating film is provided on the second surface of the semiconductor substrate and on a side surface of the through-hole. The second insulating film has a dielectric constant of not more than 6.5 and is provided on a metal portion-side surface of the first insulating film on the side surface of the through-hole of the semiconductor substrate.

According to some embodiments, a semiconductor device includes a semiconductor substrate, a metal portion, a first insulating film, and a second insulating film. The semiconductor substrate has a through-hole extending from a first surface of the semiconductor substrate to a second surface thereof opposite to the first surface. The metal portion is formed in the through-hole. The first insulating film is provided on the second surface of the semiconductor substrate and on a side surface of the through-hole. The second insulating film has a dielectric constant of not more than 6.5 and is provided on a metal portion-side surface of the first insulating film on the side surface of the through-hole of the semiconductor substrate.

Semiconductor device includes: substrate having substrate main surface and substrate rear surface facing opposite sides to each other in first direction, and substrate side surface facing in second direction orthogonal to the first direction; wiring layer having main surface electrode covering a portion of the substrate main surface, and side surface electrode connected to the main surface electrode and covering a portion of the substrate side surface; semiconductor element electrically connected to the main surface electrode and mounted on the substrate to face the substrate main surface; and sealing resin having resin side surface facing in the same direction as the substrate side surface, and covering the semiconductor element and the main surface electrode, wherein the side surface electrode has side exposed surface exposed from the sealing resin and facing in the same direction as the substrate side surface, the side exposed surface being flush with the resin side surface.