A thin stacked semiconductor device has a plurality of circuits that are laminated and formed sequentially in a specified pattern to form a multilayer wiring part. At the stage for forming the multilayer wiring part, a filling electrode is formed on the semiconductor substrate such that the surface is covered with an insulating film, a post electrode is formed on specified wiring at the multilayer wiring part, a first insulating layer is formed on one surface of the semiconductor substrate, the surface of the first insulating layer is removed by a specified thickness to expose the post electrode, and the other surface of the semiconductor substrate is ground to expose the filling electrode and to form a through-type electrode. A second insulating layer is formed on one surface of the semiconductor substrate while exposing the forward end of the through-type electrode, and bump electrodes are formed on both electrodes.

A power semiconductor package that includes a semiconductor die having at least two power electrodes and a conductive clip electrically and mechanically coupled to each power electrode.

A method for making an interconnect structure includes applying a first metal layer to an electronic device, wherein the electronic device comprises at least one I/O contact and the first metal layer is located on a surface of the I/O contact; applying a removable layer to the electronic device. The removable layer is adjacent to the first metal layer. An adhesive layer is applied to the electronic device or to a base insulative layer. The electronic device is secured to the base insulative layer using the adhesive layer. The first metal layer and removable layer are disposed between the electronic device and the base insulative layer.

A semiconductor structure includes a daisy chain adjacent to an edge of a semiconductor chip. The daisy chain includes a plurality of horizontal metal lines distributed in a plurality of metallization layers, wherein the horizontal metal lines are serially connected; a plurality of connecting pads in a same layer and electrically connecting the horizontal metal lines, wherein the connecting pads are physically separated from each other; and a plurality of vertical metal lines, each connecting one of the connecting pads to one of the horizontal metal lines, wherein one of the plurality of connecting pads is connected to one of the plurality of horizontal metal lines by only one of the plurality of vertical metal lines; and a seal ring adjacent and electrically disconnected from the daisy chain.

Semiconductor substrates with unitary vias and via terminals, and associated systems and methods are disclosed. A representative system in accordance with a particular embodiment includes a semiconductor substrate having an opening that includes a generally cylindrical portion with a generally smooth, uniform surface. The opening also includes a terminal portion extending transversely to the cylindrical portion and intersecting. A single, uniform, homogeneous volume of conductive material is disposed in both the cylindrical portion and the terminal portion of the opening, the conductive material forming a conductive path in the cylindrical portion and at least a portion of a conductive terminal in the terminal portion. The conductive terminal has a cross-section with generally flat walls aligned with crystal planes of the semiconductor substrate material. The conductive terminal projects away from the semiconductor substrate.

According to one exemplary embodiment, a semiconductor package includes a substrate having lower and upper surfaces. The semiconductor package further includes at least one passive component coupled to first and second conductive pads on the upper surface of the substrate. The semiconductor package further includes at least one semiconductor device coupled to a first conductive pad on the lower surface of the substrate. The at least one semiconductor device has a first electrode for electrical and mechanical connection to a conductive pad external to the semiconductor package. The at least one semiconductor device can have a second electrode electrically and mechanically coupled to the first conductive pad on the lower surface of the substrate.

A display drive circuit formed in a chip manufactured by a chip on glass implementation, which is connected to lead lines formed on a glass substrate, includes a rectangularly-shaped substrate, a power supply line formed on the substrate, the line being elongated along the longer side of the rectangular shaped substrate, a plurality of output terminals formed on the rectangular shaped substrate, the output terminal being disposed along the power supply line, a plurality of bump electrodes, each of which connects one of the output terminal to one of the lead lines, switches disposed along the power supply line, each of which is connected between the one of the output terminals and the power supply line, a single power supply terminal, which is disposed near the middle of the power supply line, being connected to the power supply line.

According to one exemplary embodiment, a semiconductor package includes a substrate having lower and upper surfaces. The semiconductor package further includes at least one passive component coupled to first and second conductive pads on the upper surface of the substrate. The semiconductor package further includes at least one semiconductor device coupled to a first conductive pad on the lower surface of the substrate. The at least one semiconductor device has a first electrode for electrical and mechanical connection to a conductive pad external to the semiconductor package. The at least one semiconductor device can have a second electrode electrically and mechanically coupled to the first conductive pad on the lower surface of the substrate.

A semiconductor device including: a semiconductor substrate a semiconductor element is formed; a first electrode layer stacked on the semiconductor substrate and connected to the semiconductor element; a first insulation film stacked on an upper face of the first electrode layer; and a second electrode layer stacked over the first electrode layer and the first insulation film, the second electrode layer including a material having a mechanical strength that is higher than a mechanical strength of a material included in the first electrode layer; wherein a groove portion is provided from the upper face in a direction toward a lower face of the first electrode layer, a protrusion portion protruding into the groove portion is provided on a lower face of the second electrode layer, and a lower end of the protrusion portion is positioned below the center position in a thickness direction of the first electrode layer.

A semiconductor device including: a semiconductor substrate a semiconductor element is formed; a first electrode layer stacked on the semiconductor substrate and connected to the semiconductor element; a first insulation film stacked on an upper face of the first electrode layer; and a second electrode layer stacked over the first electrode layer and the first insulation film, the second electrode layer including a material having a mechanical strength that is higher than a mechanical strength of a material included in the first electrode layer; wherein a groove portion is provided from the upper face in a direction toward a lower face of the first electrode layer, a protrusion portion protruding into the groove portion is provided on a lower face of the second electrode layer, and a lower end of the protrusion portion is positioned below the center position in a thickness direction of the first electrode layer.