A method includes providing a first structure, forming a connection pad on the first structure, forming a preliminary connection member on the connection pad, forming an adhesion layer on the first structure, the adhesion layer covering the preliminary connection member, removing a portion of the adhesion layer to expose an exposure surface of the preliminary connection member, providing a second structure, forming a chip pad and a dummy pad on the second structure, and covering the chip pad and the dummy pad with the adhesion layer that has been formed on the first structure. A thickness of the dummy pad is greater than a thickness of the chip pad.

A chip package structure includes: a substrate, a first connection chip, conductive columns, a first packaging layer, a first chip, and a second chip. The first connection chip is disposed on the substrate. The conductive columns is disposed on the substrate and located on a periphery of the first connection chip. The first packaging layer is disposed on the substrate and wrapping the first connection chip and the conductive columns, with the active surface of the first connection chip and top surfaces of the conductive columns exposed. The first chip is disposed on the first packaging layer, and coupled to both the conductive columns and the first connection chip. The second chip is disposed on the first packaging layer and that is away from the substrate, and coupled to both the conductive columns and the first connection chip.

A method for making a semiconductor device includes providing a releasable carrier attached to a conductive layer, patterning a conductive circuit on a surface of the conductive layer, applying an insulative material at least partially covering the conductive circuit, releasing the releasable carrier from the conductive layer, and facilitating the releasing with an activating source. A method of fabricating a releasable carrier includes providing a supporting carrier, attaching a releasable tape to the supporting carrier, providing a first conductive layer and a second conductive layer attached to the first conductive layer, and attaching the first conductive layer to the releasable tape, where the releasable tape is configured to release the supporting carrier from the first conductive layer after being exposed to an activating source.

The present disclosure relates to a semiconductor device, a manufacturing method, a solid state image sensor, and electronic equipment that can achieve further improvement in reliability. Connection pads are formed in interlayer films provided respectively in interconnection layers of a sensor substrate on which a sensor surface having pixels is formed and a signal processing substrate configured to perform signal processing on the sensor substrate to make an electrical connection between the sensor substrate and the signal processing substrate. Then, a metal oxide film is formed between the interlayer films of the sensor substrate and the signal processing substrate, between the connection pad formed on a side toward the sensor substrate and the interlayer film on a side toward the signal processing substrate, and between the connection pad formed on the side toward the signal processing substrate and the interlayer film on the side toward the sensor substrate. The present technology can be applied to a laminated-type CMOS image sensor, for example.

Disclosed herein is a releasable carrier that includes a supporting carrier, a carrier conductive layer, and a releasable tape located between the supporting carrier and the carrier conductive layer. The releasable tape attaches the supporting carrier to the carrier conductive layer. The releasable tape is configured to release the supporting carrier from the carrier conductive layer after being exposed to an activating source. The releasable carrier further includes a thin conductive layer attached to the carrier conductive layer, the thin conductive layer creating a surface configured to receive a conductive circuit. Further disclosed is a method for fabricating the releasable carrier and a method for making a semiconductor device using the releasable carrier.

The present disclosure relates to a semiconductor device, a manufacturing method, a solid state image sensor, and electronic equipment that can achieve further improvement in reliability. Connection pads are formed in interlayer films provided respectively in interconnection layers of a sensor substrate on which a sensor surface having pixels is formed and a signal processing substrate configured to perform signal processing on the sensor substrate to make an electrical connection between the sensor substrate and the signal processing substrate. Then, a metal oxide film is formed between the interlayer films of the sensor substrate and the signal processing substrate, between the connection pad formed on a side toward the sensor substrate and the interlayer film on a side toward the signal processing substrate, and between the connection pad formed on the side toward the signal processing substrate and the interlayer film on the side toward the sensor substrate. The present technology can be applied to a laminated-type CMOS image sensor, for example.

The present disclosure provides a semiconductor device. The semiconductor device includes: a semiconductor element having multiple electrodes; and a support body, in which the electrodes are bonded by multiple conductive bonding materials. The support body includes a first conductive portion and a second conductive portion. The electrodes include first to fourth electrodes, a first detection electrode and a second detection electrode. The semiconductor element further includes first to third wirings. A conduction path is configured to sequentially include the first wiring, the first electrode, the first conductive portion, the second electrode, the second wiring, the third electrode, the second conductive portion, the fourth electrode and the third wiring between the first detection electrode and the second detection electrode.

A bonding method and a bonding structure are provided. A device substrate is provided including a plurality of semiconductor devices, wherein each of the semiconductor devices includes a first bonding layer. A cap substrate is provided including a plurality of cap structures, wherein each of the cap structures includes a second bonding layer, the second bonding layer having a planar surface and a first protrusion protruding from the planar surface. The device substrate is bonded to the cap substrate by engaging the first protrusion of the second bonding layer of each of the cap structures with the corresponding first bonding layer of each of the semiconductor devices in the device substrate.

A bonded structure is disclosed. The bonded structure can comprise a semiconductor element comprising active circuitry and a security die electrically connected and directly bonded to a surface of the semiconductor element without an adhesive along a bonding interface. The security die can include a security core. The security core can contain an encryption logic and a memory. The security core can be configured to decrypt data to be transferred to the active circuitry and to encrypt signals from the active circuitry.

An electrical device includes a substrate, an insulating layer supported by the substrate, and an electrically conductive vertical interconnect disposed in a via hole of the insulating layer. The insulating layer may be configured to provide a coefficient of thermal expansion (CTE) that is equal to or greater than a CTE of the vertical interconnect to thereby impart axial compressive forces at opposite ends of the interconnect. The vertical interconnect may be a hybrid interconnect structure including a low CTE conductor post having a pocket that contains a high CTE conductor contact. At low operating temperatures, the high CTE conductor contact is under tension due to the higher CTE, and thus the high CTE conductor contact relieves strain in the device by void expansion and elongation.