H01L2224/10155

Tall and fine pitch interconnects
09842819 · 2017-12-12 · ·

Representative implementations of devices and techniques provide interconnect structures and components for coupling various carriers, printed circuit board (PCB) components, integrated circuit (IC) dice, and the like, using tall and/or fine pitch physical connections. Multiple layers of conductive structures or materials are arranged to form the interconnect structures and components. Nonwettable barriers may be used with one or more of the layers to form a shape, including a pitch of one or more of the layers.

TALL AND FINE PITCH INTERCONNECTS
20170053886 · 2017-02-23 · ·

Representative implementations of devices and techniques provide interconnect structures and components for coupling various carriers, printed circuit board (PCB) components, integrated circuit (IC) dice, and the like, using tall and/or fine pitch physical connections. Multiple layers of conductive structures or materials are arranged to form the interconnect structures and components. Nonwettable barriers may be used with one or more of the layers to form a shape, including a pitch of one or more of the layers.

REINFORCING RESIN COMPOSITION AND MOUNTED STRUCTURE
20250145761 · 2025-05-08 ·

A reinforcing resin composition includes: an epoxy compound (A); and an amine compound (B) including at least one selected from the group consisting of a compound (B1) represented by a formula (1), a compound (B2) represented by a formula (2), a compound (B3) represented by a formula (3), a compound (B4) represented by a formula (4), and a compound (B5) represented by a formula (5).

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Semiconductor package for stress isolation

In examples, a semiconductor package comprises a substrate having multiple conductive layers coupled to bond pads at a surface of the substrate. The package includes a semiconductor die including a device side facing the substrate, the device side having first and second circuitry regions, the first circuitry region having greater sensitivity to at least one of mechanical or thermal stress than the second circuitry region. The package also includes conductive members coupled to the bond pads of the substrate, in direct physical contact with the second circuitry region, and not in direct physical contact with the first circuitry region. The package further comprises a first support member coupled to the device side of the semiconductor die and extending toward the substrate and not touching the substrate or a second support member coupled to the substrate. The package also includes a ring on the substrate and encircling the bond pads and a glob top member covering the semiconductor die and a portion of the substrate circumscribed by the ring. The package also includes a mold compound covering the glob top member and the substrate.