H01L2224/10165

DRIVING SUBSTRATE, MICRO LED TRANSFER DEVICE AND MICRO LED TRANSFER METHOD
20240153908 · 2024-05-09 ·

A driving substrate, a micro LED transfer device and a micro LED transfer method are provided. A side surface of the driving substrate is arranged with a binding metal layer, a positioning layer is arranged around the binding metal layer, and a width of the positioning layer at a position away from the driving substrate is less than that a width at a position close to the driving substrate.

BALL GRID ARRAY AND LAND GRID ARRAY ASSEMBLIES FABRICATED USING TEMPORARY RESIST
20190229045 · 2019-07-25 ·

Ball grid assembly (BGA) bumping solder is formed on the back side of a laminate panel within a patterned temporary resist. Processes such as singulation and flip chip module assembly are conducted following BGA bumping with the temporary resist in place. The resist is removed from the back side of the singulated laminate panel prior to card assembly. Stand-off elements having relatively high melting points can be incorporated on the BGA side of the laminate panel to ensure a minimum assembly solder collapse height. Alignment assemblies are formed on the socket-facing side of an LGA module using elements having relatively high melting points and injected solder.

SUBSTRATE ASSEMBLY WITH SPACER ELEMENT
20190206821 · 2019-07-04 ·

Apparatuses, systems, and methods associated with spacer elements for maintaining a distance between a substrate and component during reflow are disclosed herein. In embodiments, a substrate assembly may include a substrate and a component. The component may be coupled to the substrate via a solder joint, wherein the solder joint may include a spacer element and solder, the spacer element to maintain a distance between the substrate and the component. Other embodiments may be described and/or claimed.

SEMICONDUCTOR DEVICE AND METHOD OF UNIT SPECIFIC PROGRESSIVE ALIGNMENT
20190139901 · 2019-05-09 ·

A semiconductor device may include a semiconductor die disposed within an encapsulant, the semiconductor die being misaligned with a package edge formed by the encapsulant. A total radial shift of the semiconductor die may account for the misalignment between semiconductor die and the package edge. A build-up interconnect structure may comprise two or more layers formed over the semiconductor die and the encapsulant, the two or more layers comprising at least one redistribution layer (RDL). The total radial shift may be distributed over the two or more layers of the build-up interconnect structure to form a unit specific pattern for each of the two or more layers. An average misalignment of the semiconductor die and the package edge may be greater than the average misalignment of the at least one unit specific pattern with respect to the package edge.

Ball grid array and land grid array assemblies fabricated using temporary resist

Ball grid assembly (BGA) bumping solder is formed on the back side of a laminate panel within a patterned temporary resist. Processes such as singulation and flip chip module assembly are conducted following BGA bumping with the temporary resist in place. The resist is removed from the back side of the singulated laminate panel prior to card assembly. Stand-off elements having relatively high melting points can be incorporated on the BGA side of the laminate panel to ensure a minimum assembly solder collapse height. Alignment assemblies are formed on the socket-facing side of an LGA module using elements having relatively high melting points and injected solder.

METHOD FOR ALIGNING CHIP COMPONENTS RELATIVE TO SUBSTRATE BY USING LIQUID

A liquid is supplied to a substrate and a chip component is arranged on the liquid. The substrate includes a first surface in which a rectangular mounting region is formed. The chip component includes a second surface having a rectangular shape which substantially coincides with the shape of the mounting region, and has an area substantially equal to that of the mounting region. The mounting region includes first and second regions. Wettability of the first region with respect to the liquid is higher than that of the second region with respect to the liquid. The first region is provided symmetrically with respect to a first central line passing through the middle of a pair of long sides and a second central line passing through the middle of a pair of short sides in the mounting region, and includes rectangular partial regions. The liquid is supplied to the first region.

Method for wafer-level semiconductor die attachment
10217718 · 2019-02-26 · ·

A wafer-level semiconductor die attachment method includes placing a semiconductor die of a plurality of semiconductor dies at an initial placement position to overlap a sub-mount pad on a sub-mount of a pre-singulated wafer. A die pad of the semiconductor die comes in contact with a solder layer deposited over the sub-mount pad. The semiconductor die and the sub-mount include a plurality of die and sub-mount mating features, respectively. The solder layer is heated locally to temporarily hold the semiconductor die at the initial placement position. The pre-singulated wafer is reflowed, when each semiconductor die is temporarily held at the corresponding initial placement position. During reflow, each semiconductor die slides from the initial placement position and a contact is established between the corresponding plurality of die and sub-mount mating features. Thereby, each semiconductor die is permanently attached to the corresponding sub-mount.

FLIP-CHIP ELECTRONIC DEVICE WITH CARRIER HAVING HEAT DISSIPATION ELEMENTS FREE OF SOLDER MASK
20190043838 · 2019-02-07 ·

A solution relating to electronic devices of flip-chip type is provided, which includes at least one chip carrier having a carrier surface, the carrier(s) including one or more contact elements of electrically conductive material on the carrier surface, at least one integrated circuit chip having a chip surface, the chip(s) including one or more terminals of electrically conductive material on the chip surface each one facing a corresponding contact element, solder material soldering each terminal to the corresponding contact element, and a restrain structure around the contact elements for restraining the solder material during a soldering of the terminals to the contact elements. The carrier includes one or more heat dissipation elements of thermally conductive material on the carrier surface facing the chip surface displaced from the terminals, the dissipation elements being free of any solder mask.

Package structure having magnetic bonding between substrates

A package structure and method for forming the same are provided. The package structure includes a first die, and the first die includes a first magnetic pad formed over a first substrate. The package structure includes a second die, and the second die includes a second magnetic pad formed over a second substrate. The package structure also includes a hybrid bonding structure formed between the first die and the second die of the second wafer. The hybrid bonding structure includes a magnetic bonding structure which is made of the first magnetic pad and the second magnetic layer.

Flip-chip electronic device with carrier having heat dissipation elements free of solder mask

A solution relating to electronic devices of flip-chip type is provided, which includes at least one chip carrier having a carrier surface, the carrier(s) including one or more contact elements of electrically conductive material on the carrier surface, at least one integrated circuit chip having a chip surface, the chip(s) including one or more terminals of electrically conductive material on the chip surface each one facing a corresponding contact element, solder material soldering each terminal to the corresponding contact element, and a restrain structure around the contact elements for restraining the solder material during a soldering of the terminals to the contact elements. The carrier includes one or more heat dissipation elements of thermally conductive material on the carrier surface facing the chip surface displaced from the terminals, the dissipation elements being free of any solder mask.