A system and method of manufacturing a system are disclosed. An embodiment of the system includes a first packaged component comprising a first component and a first redistribution layer (RDL) disposed on a first main surface of the first packaged component, wherein the first RDL includes first pads. The system further includes a second packaged component having a second component disposed at a first main surface of the second packaged component, the first main surface having second pads and a connection layer between the first packaged component and the second packaged component, wherein the connection layer connects a first plurality of the first pads with the second pads.

A system and method of manufacturing a system are disclosed. An embodiment of the system includes a first packaged component comprising a first component and a first redistribution layer (RDL) disposed on a first main surface of the first packaged component, wherein the first RDL includes first pads. The system further includes a second packaged component having a second component disposed at a first main surface of the second packaged component, the first main surface having second pads and a connection layer between the first packaged component and the second packaged component, wherein the connection layer connects a first plurality of the first pads with the second pads.

Methods of forming connector pad structures, interconnect structures, and structures thereof are disclosed. In some embodiments, a method of forming a connector pad structure includes forming an underball metallization (UBM) pad, and increasing a surface roughness of the UBM pad by exposing the UBM pad to a plasma treatment. A polymer material is formed over a first portion of the UBM pad, leaving a second portion of the UBM pad exposed.

Methods of forming connector pad structures, interconnect structures, and structures thereof are disclosed. In some embodiments, a method of forming a connector pad structure includes forming an underball metallization (UBM) pad, and increasing a surface roughness of the UBM pad by exposing the UBM pad to a plasma treatment. A polymer material is formed over a first portion of the UBM pad, leaving a second portion of the UBM pad exposed.

A semiconductor wafer has an edge support ring around a perimeter of the semiconductor wafer and conductive layer formed over a surface of the semiconductor wafer within the edge support ring. A first stencil is disposed over the edge support ring with first openings aligned with the conductive layer. The first stencil includes a horizontal portion over the edge support ring, and a step-down portion extending the first openings to the conductive layer formed over the surface of the semiconductor wafer. The horizontal portion may have a notch with the edge support ring disposed within the notch. A plurality of bumps is dispersed over the first stencil to occupy the first openings over the conductive layer. A second stencil is disposed over the edge support ring with second openings aligned with the conductive layer to deposit a flux material in the second openings over the conductive layer.

Disclosed examples provide methods that include forming a conductive structure at least partially above a conductive feature of a wafer, attaching a solder ball structure to a side of the conductive structure, and thereafter forming a repassivation layer on a side of the wafer proximate the side of the conductive structure. Further examples provide microelectronic devices and integrated circuits that include a conductive structure coupled with a conductive feature of a metallization structure, a solder ball structure connected to the conductive structure, and a printed repassivation layer disposed on the side of the metallization structure proximate a side of the conductive structure.

The present invention relates to a reflow film containing a thermoplastic resin which is dissolvable in a solvent, and solder particles, wherein the solder particles are dispersed in the film, and also relates to a solder bump formation method which comprises: (A) a step of mounting the reflow film on the electrode surface side of a substrate, (B) a step of mounting and fixing a flat plate, (C) a step of heating, and (D) a step of dissolving and removing the reflow film, and herewith, a reflow film is provided which, by causing localization of the solder component on the electrodes of the substrate by self-assembly, exhibits excellent storage properties, transportability and handling properties during use, and can form solder bumps or solder joints selectively on only the electrodes.

A semiconductor device is provided with a semiconductor element having a plurality of electrodes, a plurality of terminals electrically connected to the plurality of electrodes, and a sealing resin covering the semiconductor element. The sealing resin covers the plurality of terminals such that a bottom surface of the semiconductor element in a thickness direction is exposed. A first terminal, which is one of the plurality of terminals, is disposed in a position that overlaps a first electrode, which is one of the plurality of electrodes, when viewed in the thickness direction. The semiconductor device is provided with a conductive connection member that contacts both the first terminal and the first electrode.

A method of fabricating an interconnect structure includes providing a semiconductor structure and performing a first spin resist and bake cycle. The first spin resist and bake cycle includes applying a first predetermined amount of a resist material over one or more portions of the semiconductor structure and baking the semiconductor structure to form a first resist layer portion of a resist layer. The method also includes performing a next spin resist and bake cycle. The next spin resist and bake cycle includes applying a next predetermined amount of the resist material and baking the semiconductor structure to form a next resist layer portion of the resist layer. The method additionally includes depositing a conductive material in an opening formed in the resist layer and forming a conductive structure from the conductive material. An interconnect structure is also provided.

The present disclosure provides a semiconductor package that prevents a bump bridge from being formed between adjacent conductive bumps to realize a fine bump pitch when each unit circuit part is directly stacked without using a printed circuit board and a method for manufacturing the same. The semiconductor package includes a first semiconductor chip structure including a first unit circuit part, a first passivation layer disposed on the first unit circuit part, and a conductive bump electrically connected to the first unit circuit part, and a second semiconductor chip structure including a second unit circuit part, a second passivation layer having a stepped portion that is recessed inward and disposed on the second unit circuit part, and a bump pad provided in the stepped portion. The first semiconductor chip structure and the second semiconductor chip structure are stacked to allow the conductive bump to be bonded to the bump pad within the stepped portion.