A semiconductor device includes a semiconductor substrate, a conductive pad on the semiconductor substrate, and a conductor over the conductive pad. The semiconductor device further has a polymeric material disposed over the semiconductor substrate and surrounding the conductor. The semiconductor device also includes an electric conductive layer between the conductor and the polymeric material. In the semiconductor device, an adhesion strength between the electric conductive layer and the polymeric material is greater than an adhesion strength between the polymeric material and the conductor.

Packaging devices and methods of manufacture thereof for semiconductor devices are disclosed. In some embodiments, a packaging device includes a contact pad disposed over a substrate, and a passivation layer disposed over the substrate and a first portion of the contact pad, a second portion of the contact pad being exposed. A post passivation interconnect (PPI) line is disposed over the passivation layer and is coupled to the second portion of the contact pad. A PPI pad is disposed over the passivation layer and is coupled to the PPI line. An insulating material is disposed over the PPI line, the PPI pad being exposed. The insulating material is spaced apart from an edge portion of the PPI pad by a predetermined distance.

A semiconductor package structure is provided. The semiconductor package structure includes a first electronic component on a substrate. The semiconductor package structure also includes a second electronic component stacked on the first electronic component. The active surface of the first electronic component faces the active surface of the second electronic component. The semiconductor package structure further includes a molding compound on the first electronic component and surrounding the second electronic component. In addition, the semiconductor package structure includes a third electronic component stacked on the second electronic component and the molding compound.

A reinforcing resin composition includes an epoxy resin (A), a phenolic resin (B), and a benzoxazine compound (C).

Highly reliable chip mounting is accomplished by using a substrate having such a shape that a stress exerted on a flip-chip-connected chip can be reduced, so that the stress exerted on the chip is reduced and separation of an interlayer insulating layer having a low dielectric constant (low-k) is minimized. Specifically, in a chip mounting structure, a chip including an interlayer insulating layer having a low dielectric constant (low-k) is flip-chip connected to a substrate via bumps is shown. In the chip mounting structure, the substrate has such a shape that a mechanical stress exerted on the interlayer insulating layer at corner portions of the chip due to a thermal stress is reduced, the thermal stress occurring due to a difference in coefficient of thermal expansion between the chip and the substrate.

A method includes forming a conductive pillar over and connecting to a conductive pad, dispensing a first polymer layer, wherein the first polymer layer contacts a lower portion of a sidewall of the conductive pillar, curing the first polymer layer, and dispensing a second polymer layer on the first polymer layer. The second polymer layer contacts an upper portion of the sidewall of the conductive pillar. The second polymer layer is then cured.

The present application is applicable to the field of semiconductor technology and provides a method for packaging stacking a flip chip, which includes: placing a filling template on a substrate, the filling template being provided with a through hole of a preset pattern; filling a filling material into the through hole of the filling template, and after the filling material being formed on the substrate, removing the filling template; placing a chip with solder balls on the substrate formed with the filling material, such that at least a portion of the solder balls being covered by the filling material; and connecting the chip to the substrate through the solder balls, and curing the filling material with air gaps formed between the at least a portion of the solder balls covered with the filling material.

An object is to provide a semiconductor device and a method of manufacturing the semiconductor device which can reduce occurrence of a triple point of three layers of a plating layer, a resin layer, and a solder layer on an electrode layer, and prevent a split in the electrode layer. A semiconductor device is sealed by a sealing resin, and the semiconductor device includes: a semiconductor substrate; an electrode layer on an upper surface of the semiconductor substrate; a plating layer on an upper surface of the electrode layer, the plating layer including a first region, and a second region outside of the first region in a plan view; a solder layer on the first region of the plating layer; and a solder blocking portion on the plating layer, the solder blocking portion blocking solder from flowing on the second region from above the first region.

A semiconductor package capable of reducing or preventing cracks from occurring in a conductive bump and a method for manufacturing the same. The semiconductor package includes a semiconductor chip; a first conductive bump; a first re-distribution layer which is provided between the semiconductor chip and the first conductive bump and electrically connects the semiconductor chip and the first conductive bump; and a buffer structure which formed to fill up a space between a side surface of the first conductive bump and one surface of the first re-distribution layer, in which the buffer structure includes a plurality of pores.

A method includes forming a conductive pillar over and connecting to a conductive pad, dispensing a first polymer layer, wherein the first polymer layer contacts a lower portion of a sidewall of the conductive pillar, curing the first polymer layer, and dispensing a second polymer layer on the first polymer layer. The second polymer layer contacts an upper portion of the sidewall of the conductive pillar. The second polymer layer is then cured.