Patent classifications
H01L2224/11013
Metal-Bump Sidewall Protection
A method includes forming a metal bump on a top surface of a first package component, forming a solder region on a top surface of the metal bump, forming a protection layer extending on a sidewall of the metal bump, reflowing the solder region to bond the first package component to a second package component, and dispensing an underfill between the first package component and the second package component. The underfill is in contact with the protection layer.
DIELECTRIC MOLDED INDIUM BUMP FORMATION AND INP PLANARIZATION
The disclosed technique may be used to electrically and physically connect semiconductor wafers to allow high density interconnects and accommodate mismatched coefficients of thermal expansion materials by having room temperature hybridization as well as to remove the bow from wafers. The wafers may utilize a thick dielectric to remove the bow and create a planar surface. Indium bumps may be deposited and patterned in a dielectric film with a small diameter, tall height and substantially uniform in size and shape. The indium can be melted to create small grain size and uniform height bumps. The dielectric film may feature trenches around the indium bumps to prevent shorting of pixels when pressed together. The small size of the columns enables wafer or chip scale hybridization with a very high interconnect density, high reliability, and the ability to accommodate mismatches in the coefficients of thermal expansion of the constituent materials.
Flux-free solder ball mount arrangement
A system for the flux free processing of a plurality of solder balls on a wafer, comprising: an articulable vacuum support chuck for maintaining support of a plurality of solder balls on a wafer being processed. An articulable flux-free binder applicator arranged in binder depositing relationship with the wafer within the treatment chamber. An articulable fluid dispenser is arranged in a binder-applied minimization-treatment with respect to the flux free binder applied to the wafer within the treatment chamber.
MULTI-CHIP PACKAGING
An electronic device may include a first die that may include a first set of die contacts. The electronic device may include a second die that may include a second set of die contacts. The electronic device may include a bridge interconnect that may include a first set of bridge contacts and may include a second set of bridge contacts. The first set of bridge contacts may be directly coupled to the first set of die contacts (e.g., with an interconnecting material, such as solder). The second set of bridge contacts may be directly coupled to the second set of die contacts (e.g., with solder). The bridge interconnect may help facilitate electrical communication between the first die and the second die.
Semiconductor device
A semiconductor device includes an electronic component, a package, a substrate and a plurality of first conductors and second conductors. The package is over the electronic component. T substrate is between the electronic component and the package. The substrate includes a first portion covered by the package, and a second portion protruding out of an edge of the package and uncovered by the package. The first conductors and second conductors are between and electrically connected to the electronic component and the substrate. A width of a second conductor of the plurality of second conductors is larger than a width of a first conductor of the plurality of first conductors, the first conductors are disposed between the second portion of the substrate and the electronic component, and the second conductors are disposed between the first portion of the substrate and the electronic component.
Semiconductor device and manufacturing method thereof
A semiconductor device includes a substrate includes a first layer and a second layer over the first layer, a bump disposed over the second layer, a molding disposed over the second layer and surrounding the bump, and a retainer disposed over the second layer, wherein the retainer is disposed between the molding and a periphery of the substrate. Further, a method of manufacturing a semiconductor device includes providing a substrate, disposing several bumps on the substrate, disposing a retainer on the substrate and surrounding the bumps, and disposing a molding between the bumps and the retainer.
Method for manufacturing compliant bump
Provided is a method of manufacturing compliant bumps, the method including preparing an electronic device including at least one conductive pad, forming an elastic resin layer on the electronic device, forming a photoresist layer on the elastic resin layer, forming a first photoresist pattern on a region spaced apart from a region where the conductive pad is located, forming a second photoresist pattern having a lower cross-sectional area greater than an upper cross-sectional area, forming an elastic resin pattern having a lower cross-sectional area greater than an upper cross-sectional area, on a region spaced apart from a region where the conductive pad is located, and forming a conductive wiring pattern covering at least a part of the elastic resin pattern and extending to the conductive pad.
Tall and fine pitch interconnects
Representative implementations of devices and techniques provide interconnect structures and components for coupling various carriers, printed circuit board (PCB) components, integrated circuit (IC) dice, and the like, using tall and/or fine pitch physical connections. Multiple layers of conductive structures or materials are arranged to form the interconnect structures and components. Nonwettable barriers may be used with one or more of the layers to form a shape, including a pitch of one or more of the layers.
Semiconductor wafer processing method
A semiconductor wafer processing method includes a step of forming a laser processed groove on the front side of a semiconductor wafer along each division line, a step of forming a mask layer on a protective layer except in an area above a metal electrode formed in each device on the front side of the wafer, a first etching step of etching the protective layer by using the mask layer to expose each metal electrode, a second etching step of etching the inner surface of each laser processed groove by using the mask layer used in the first etching step, thereby expanding each laser processed groove, and a dividing step of dividing the wafer along each laser processed groove expanded in the second etching step.
Metal-bump sidewall protection
A method includes forming a metal bump on a top surface of a first package component, forming a solder region on a top surface of the metal bump, forming a protection layer extending on a sidewall of the metal bump, reflowing the solder region to bond the first package component to a second package component, and dispensing an underfill between the first package component and the second package component. The underfill is in contact with the protection layer.