Patent classifications
H01L2224/11472
Conical-Shaped or Tier-Shaped Pillar Connections
A pillar structure, and a method of forming, for a substrate is provided. The pillar structure may have one or more tiers, where each tier may have a conical shape or a spherical shape. In an embodiment, the pillar structure is used in a bump-on-trace (BOT) configuration. The pillar structures may have circular shape or an elongated shape in a plan view. The substrate may be coupled to another substrate. In an embodiment, the another substrate may have raised conductive traces onto which the pillar structure may be coupled.
Semiconductor devices, methods of manufacture thereof, and packaged semiconductor devices
Semiconductor devices, methods of manufacture thereof, and packaged semiconductor devices are disclosed. A method of forming a device includes forming a conductive trace over a first substrate, the conductive trace having first tapering sidewalls, forming a conductive bump over a second substrate, the conductive bump having second tapering sidewalls and a first surface distal the second substrate, and attaching the conductive bump to the conductive trace via a solder region. The solder region extends from the first surface of the conductive bump to the first substrate, and covers the first tapering sidewalls of the conductive trace. The second tapering sidewalls of the conductive bump are free of the solder region.
LIGHT RECEIVING ELEMENT AND LIGHT RECEIVING DEVICE
A light receiving element includes: a semiconductor layer including a first layer, a light absorbing layer, a second layer, and a third layer, the semiconductor layer having a plurality of mesas, a terrace, and a groove; a first electrode provided on the mesas and electrically connected to the third layer; a first bump provided on the first electrode and electrically connected to the first electrode; a second electrode provided on a portion extending from the terrace to an inner side of the groove and electrically connected to the first layer; and a second bump larger than the first bump, is provided on the terrace, and is electrically connected to the second electrode, wherein the mesas and the terrace include the semiconductor layer, the groove extends to the first layer, and the second electrode is in contact with the first layer on an inner side of the groove.
COMBING BUMP STRUCTURE AND MANUFACTURING METHOD THEREOF
A manufacturing method of a combing bump structure is disclosed. In the manufacturing method, a semiconductor substrate is provided, a pad is formed on the semiconductor substrate, a conductive layer is formed on the pad, a solder bump is formed on the conductive layer, and at least two metal side walls are formed disposed along opposing laterals of the solder bump respectively.
SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DETECTOR, METHODS FOR MANUFACTURING SAME, AND SEMICONDUCTOR CHIP OR SUBSTRATE
In a method for manufacturing a radiation detector, counter pixel electrodes 33 are formed on a counter substrate 2 at positions facing a plurality of pixel electrodes formed on a signal reading substrate, and wall bump electrodes 34 are further formed on the counter pixel electrodes 33. In order to achieve the above, a resist R is applied, and the resist R is exposed to light to form openings O. When Au sputter deposition is performed on the openings O, only some of the Au is deposited on the bottom surface in the openings O as the counter pixel electrodes 33. The rest of the Au is not deposited on the bottom surface in the openings O, and the most of the remaining Au adheres to the inner walls of the openings O to form wall bump electrodes 34. The bump electrodes 34 are cylindrical, making it possible to reduce the pressure acting on the signal reading substrate by an extent corresponding to the decrease in the bonding area in comparison to conventional bump-shaped bump electrodes. The decrease in the bonding area also makes it possible to correspondingly improve the reproducibility of forming the diameter of the electrodes, and make reliable connection possible.
Conductive pillar structure
The invention relates to a bump structure of a semiconductor device. An exemplary structure for a semiconductor device comprises a substrate; a contact pad over the substrate; a passivation layer extending over the substrate having an opening over the contact pad; and a conductive pillar over the opening of the passivation layer, wherein the conductive pillar comprises an upper portion substantially perpendicular to a surface of the substrate and a lower portion having tapered sidewalls.
SOLID-STATE IMAGING DEVICE
A solid-state imaging device encompasses a detector substrate having a first main-surface, on which a plurality of first lands are arranged in a matrix, and a signal-circuit substrate having a second main-surface, on which plurality of second lands are arranged so as to face the arrangement of the first lands. A plurality of tubular bumps, each of which having a flattened plane pattern, and is provided between each of the first lands and each of the second lands. The tubular bumps respectively have major-axis directions to define inclined angles, and are arranged in the matrix such that the inclined angles differ depending on locations of the plurality of tubular bumps.
Solid-state imaging device
A solid-state imaging device encompasses a detector substrate having a first main-surface, on which a plurality of first lands are arranged in a matrix, and a signal-circuit substrate having a second main-surface, on which plurality of second lands are arranged so as to face the arrangement of the first lands. A plurality of tubular bumps, each of which having a flattened plane pattern, and is provided between each of the first lands and each of the second lands. The tubular bumps respectively have major-axis directions to define inclined angles, and are arranged in the matrix such that the inclined angles differ depending on locations of the plurality of tubular bumps.
Method of electroplating photoresist defined features from copper electroplating baths containing reaction products of pyridyl alkylamines and bisepoxides
Electroplating methods enable the plating of photoresist defined features which have substantially uniform morphology. The electroplating methods include copper electroplating baths with reaction products of pyridyl alkylamines and bisepoxides to electroplate the photoresist defined features. Such features include pillars, bond pads and line space features.
MICRO-DEVICE POCKETS FOR TRANSFER PRINTING
A method of micro-transfer printing a micro-device from a support substrate comprises providing the micro-device, forming a pocket in or on the support substrate, providing a release layer over the micro-device or the pocket, optionally providing a base layer on a side of the release layer opposite the micro-device, disposing the micro-device in the pocket with the release layer between the micro-device and the support substrate so that no portion of the support substrate or the optional base layer is in contact with the micro-device, etching the release layer to completely separate the micro-device from the support substrate or the optional base layer, providing a stamp having a conformable stamp post and pressing the stamp post against the separated micro-device to adhere the micro-device to the stamp post, and removing the stamp and micro-device from the support substrate.