H01L2224/1148

Integrated circuit structure and method for reducing polymer layer delamination

An embodiment integrated circuit structure includes a substrate, a metal pad over the substrate, a post-passivation interconnect (PPI) structure over the substrate and electronically connected to the metal pad, a first polymer layer over the PPI structure, an under bump metallurgy (UBM) extending into an opening in the first polymer layer and electronically connected to the PPI structure, and a barrier layer on a top surface of the first polymer layer adjacent to the UBM.

Multi-strike process for bonding

A method includes performing a first strike process to strike a metal bump of a first package component against a metal pad of a second package component. A first one of the metal bump and the metal pad includes copper. A second one of the metal bump and the metal pad includes aluminum. The method further includes performing a second strike process to strike the metal bump against the metal pad. An annealing is performed to bond the metal bump on the metal pad.

Semiconductor chip with patterned underbump metallization and polymer film

Various semiconductor chip solder bump and underbump metallization (UBM) structures and methods of making the same are disclosed. In one aspect, a method is provided that includes forming a first underbump metallization layer on a semiconductor chip is provided. The first underbump metallization layer has a hub, a first portion extending laterally from the hub, and a spoke connecting the hub to the first portion. A polymer layer is applied to the first underbump metallization layer. The polymer layer includes a first opening in alignment with the hub and a second opening in alignment with the spoke. A portion of the spoke is removed via the second opening to sever the connection between the hub and the first portion.

Photoresist Cleaning Composition Used in Photolithography and a Method for Treating Substrate Therewith

It is disclosed a photoresist cleaning composition for stripping a photoresist pattern having a film thickness of 3-150 m, which contains (a) quaternary ammonium hydroxide (b) a mixture of water-soluble organic solvents (c) at least one corrosion inhibitor and (d) water, and a method for treating a substrate therewith.

Photoresist Cleaning Composition Used in Photolithography and a Method for Treating Substrate Therewith

It is disclosed a photoresist cleaning composition for stripping a photoresist pattern having a film thickness of 3-150 m, which contains (a) quaternary ammonium hydroxide (b) a mixture of water-soluble organic solvents (c) at least one corrosion inhibitor and (d) water, and a method for treating a substrate therewith.

CHIP MOUNTING STRUCTURE

Highly reliable chip mounting is accomplished by using a substrate having such a shape that a stress exerted on a flip-chip-connected chip can be reduced, so that the stress exerted on the chip is reduced and separation of an interlayer insulating layer having a low dielectric constant (low-k) is minimized. Specifically, in a chip mounting structure, a chip including an interlayer insulating layer having a low dielectric constant (low-k) is flip-chip connected to a substrate via bumps is shown. In the chip mounting structure, the substrate has such a shape that a mechanical stress exerted on the interlayer insulating layer at corner portions of the chip due to a thermal stress is reduced, the thermal stress occurring due to a difference in coefficient of thermal expansion between the chip and the substrate.