An article of manufacture comprises: an integrated circuit having a contact; a conductive bump electrically coupled to the contact, the conductive bump having a profile with a wave pattern; a lead frame electrically coupled to the conductive bump; and an integrated circuit package mold, the integrated circuit package mold covering portions of the conductive bump and the lead frame.

A semiconductor device according to an embodiment of the present invention comprises pads electrically connected to wires provided on an insulating substrate. A wiring substrate comprises a first insulant provided between the pads. A first semiconductor chip comprises metal bumps respectively connected to the pads on the wiring substrate on a first face facing the wiring substrate. A first adhesion layer is provided between the first insulant and the first semiconductor chip and adheres the wiring substrate and the first semiconductor chip to each other. An insulating resin is provided to cover peripheries of the first adhesion layer and the metal bumps between the wiring substrate and the first semiconductor chip, and a structure on the wiring substrate.

A semiconductor device according to an embodiment of the present invention comprises pads electrically connected to wires provided on an insulating substrate. A wiring substrate comprises a first insulant provided between the pads. A first semiconductor chip comprises metal bumps respectively connected to the pads on the wiring substrate on a first face facing the wiring substrate. A first adhesion layer is provided between the first insulant and the first semiconductor chip and adheres the wiring substrate and the first semiconductor chip to each other. An insulating resin is provided to cover peripheries of the first adhesion layer and the metal bumps between the wiring substrate and the first semiconductor chip, and a structure on the wiring substrate.

An article of manufacture comprises: an integrated circuit having a contact; a conductive bump electrically coupled to the contact, the conductive bump having a profile with a wave pattern; a lead frame electrically coupled to the conductive bump; and an integrated circuit package mold, the integrated circuit package mold covering portions of the conductive bump and the lead frame.

Provided is a method of manufacturing compliant bumps, the method including preparing an electronic device including at least one conductive pad, forming an elastic resin layer on the electronic device, forming a photoresist layer on the elastic resin layer, forming a first photoresist pattern on a region spaced apart from a region where the conductive pad is located, forming a second photoresist pattern having a lower cross-sectional area greater than an upper cross-sectional area, forming an elastic resin pattern having a lower cross-sectional area greater than an upper cross-sectional area, on a region spaced apart from a region where the conductive pad is located, and forming a conductive wiring pattern covering at least a part of the elastic resin pattern and extending to the conductive pad.

Semiconductor devices, methods of manufacture thereof, and semiconductor device packages are disclosed. In one embodiment, a semiconductor device includes an insulating material layer having openings on a surface of a substrate. One or more insertion bumps are disposed over the insulating material layer. The semiconductor device includes signal bumps having portions that are not disposed over the insulating material layer.

Provided is a method of manufacturing compliant bumps, the method including preparing an electronic device including at least one conductive pad, forming an elastic resin layer on the electronic device, forming a photoresist layer on the elastic resin layer, forming a first photoresist pattern on a region spaced apart from a region where the conductive pad is located, forming a second photoresist pattern having a lower cross-sectional area greater than an upper cross-sectional area, forming an elastic resin pattern having a lower cross-sectional area greater than an upper cross-sectional area, on a region spaced apart from a region where the conductive pad is located, and forming a conductive wiring pattern covering at least a part of the elastic resin pattern and extending to the conductive pad.

A method for estimating a thickness related to multiple conductive structural elements of an object, the method includes estimating a height difference between an upper surface of a conductive structural element and an upper surface of a photoresists layer portion that surrounds the conductive structural element, to provide multiple height differences; estimating thicknesses of the multiple photoresists layer portions, based at least on the second part of the emitted radiation; and calculating thickness values related to the multiple conductive structural elements, wherein the calculating is based at least on the multiple height differences and on the estimated thickness of the multiple photoresists layer portions.

The present disclosure relates to a semiconductor device. The semiconductor device includes a semiconductor substrate, a conductive through electrode, an insulating film, a bump and a connection layer, wherein the connection layer comprises a patternable material with conductive particles. The conductive through electrode penetrates through the semiconductor substrate. The patternable material comprises photosensitive material. The photosensitive material is a photoresist or polyimide. The conductive particles comprise copper (Cu), nickel (Ni), gold (Au), or silver (Ag). The connection layer is formed by spin coating, CVD (chemical vapor deposition) process or PVD (physical vapor deposition) process. The insulating film surrounds the conductive through electrode and electrically isolates the conductive through electrode from the is substrate. The bump is disposed over the conductive through electrode. The connection layer is disposed over the bump.

The present disclosure relates to a semiconductor device. The semiconductor device includes a semiconductor substrate, a conductive through electrode, an insulating film, a bump and a connection layer, wherein the connection layer comprises a patternable material with conductive particles. The conductive through electrode penetrates through the semiconductor substrate. The patternable material comprises photosensitive material. The photosensitive material is a photoresist or polyimide. The conductive particles comprise copper (Cu), nickel (Ni), gold (Au), or silver (Ag). The connection layer is formed by spin coating, CVD (chemical vapor deposition) process or PVD (physical vapor deposition) process. The insulating film surrounds the conductive through electrode and electrically isolates the conductive through electrode from the is substrate. The bump is disposed over the conductive through electrode. The connection layer is disposed over the bump.