The semiconductor device includes a semiconductor element, a main lead and a resin package. The semiconductor element includes an obverse surface and a reverse surface spaced apart from each other in a thickness direction. The main lead supports the semiconductor element via the reverse surface of the semiconductor element. The resin package covers the entirety of the semiconductor element. The resin package covers the main lead in such a manner that a part of the main lead is exposed from the resin package. The semiconductor element includes a part that does not overlap the main lead as viewed in the thickness direction.

A power semiconductor chip having: a semiconductor component body; a multilayer metallization arranged on the semiconductor component body; and a nickel layer arranged over the semiconductor component body. The invention further relates to a method for producing a power semiconductor chip and to a power semiconductor device. The invention provides a power semiconductor chip which has a metallization to which a copper wire, provided without a thick metallic coating, can be reliably bonded without damage to the power semiconductor chip during bonding.

A nanostructure barrier for copper wire bonding includes metal grains and inter-grain metal between the metal grains. The nanostructure barrier includes a first metal selected from nickel or cobalt, and a second metal selected from tungsten or molybdenum. A concentration of the second metal is higher in the inter-grain metal than in the metal grains. The nanostructure barrier may be on a copper core wire to provide a coated bond wire. The nanostructure barrier may be on a bond pad to form a coated bond pad. A method of plating the nanostructure barrier using reverse pulse plating is disclosed. A wire bonding method using the coated bond wire is disclosed.

A power module (PM) includes: an insulating substrate; a semiconductor device disposed on the insulating substrate, the semiconductor device including electrodes on a front surface side and a back surface side thereof; and a graphite plate having an anisotropic thermal conductivity, the graphite plate of which one end is connected to the front surface side of the semiconductor device and the other end is connected to the insulating substrate, wherein heat of the front surface side of the semiconductor device is transferred to the insulating substrate through the graphite plate. There is provide an inexpensive power module capable of reducing a stress and capable of exhibiting cooling performance not inferior to that of the double-sided cooling structures.

A method of producing optoelectronic semiconductor components includes providing a carrier with a carrier underside and a carrier top. The carrier has a metallic core material and at least on the carrier top a metal layer. A dielectric mirror is applied to the core material. At least two holes are formed through the carrier. A ceramic layer with a thickness of at most 150 m at least on the carrier underside and in the holes is produced. The ceramic layer includes the core material as a component. Metallic contact layers are applied to at least subregions of the ceramic layer on the carrier underside and in the holes so that the carrier top electrically connects to the carrier underside through the holes. At least one radiation-emitting semiconductor chip is applied to the carrier top and the semiconductor chip is electronically bonded to the contact layers.

A method of producing optoelectronic semiconductor components includes providing a carrier with a carrier underside and a carrier top. The carrier has a metallic core material and at least on the carrier top a metal layer. A dielectric mirror is applied to the core material. At least two holes are formed through the carrier. A ceramic layer with a thickness of at most 150 m at least on the carrier underside and in the holes is produced. The ceramic layer includes the core material as a component. Metallic contact layers are applied to at least subregions of the ceramic layer on the carrier underside and in the holes so that the carrier top electrically connects to the carrier underside through the holes. At least one radiation-emitting semiconductor chip is applied to the carrier top and the semiconductor chip is electronically bonded to the contact layers.

A semiconductor device includes plural electrode pads arranged in an active region of a semiconductor chip, and wiring layers provided below the plural electrode pads wherein occupation rates of wirings arranged within the regions of the electrode pads are, respectively, made uniform for every wiring layer. To this end, in a region where an occupation rate of wiring is smaller than those in other regions, a dummy wiring is provided. On the contrary, when the occupation rate of wiring is larger than in other regions, slits are formed in the wiring to control the wiring occupation rate. In the respective wirings layers, the shapes, sizes and intervals of wirings below the respective electrode pads are made similar or equal to one another.

A light emitting device includes a base member, a light emitting element, a wire, a protective film, first and second resin members, and a light shielding portion. The base member has a conductive member. The wire connects the light emitting element and the conductive member. The protective film covers the conductive member to be spaced apart from a portion of a connecting portion. The first resin member continuously covers at least a portion of each of the protective film, a portion of the conductive member around the connecting portion, and the wire. The first resin member contains first light reflecting particles to reflect light emitted by the light emitting element. The second resin member covers the light emitting element and the first resin member. The light shielding portion is disposed on the base member and disposed on a line connecting the light emitting element and the first resin member.

A light emitting device includes a base member, a light emitting element, a wire, a protective film, first and second resin members, and a light shielding portion. The base member has a conductive member. The wire connects the light emitting element and the conductive member. The protective film covers the conductive member to be spaced apart from a portion of a connecting portion. The first resin member continuously covers at least a portion of each of the protective film, a portion of the conductive member around the connecting portion, and the wire. The first resin member contains first light reflecting particles to reflect light emitted by the light emitting element. The second resin member covers the light emitting element and the first resin member. The light shielding portion is disposed on the base member and disposed on a line connecting the light emitting element and the first resin member.

A semiconductor device includes a wiring substrate having an upper surface, a plurality of terminals formed on the upper surface, and a lower surface opposite to the upper surface, a first semiconductor chip having a first main surface, a plurality of first electrodes formed on the first main surface, and a first rear surface opposite to the first main surface, and mounted over the upper surface of the wiring substrate such that the first rear surface of the first semiconductor chip faces the upper surface of the wiring substrate, and a plurality of wires electrically connected with the plurality of terminals, respectively.