A micro light emitting diode (LED) transfer device includes a transfer part configured to transfer a relay substrate having at least one micro LED; a mask having openings corresponding to a position of the at least one micro LED; a first laser configured to irradiate a first laser light having a first wavelength to the mask; a second laser configured to irradiate a second laser light having a second wavelength different from the first wavelength to the mask; and a processor configured to: control the at least one micro LED to contact a coupling layer of a target substrate, and based on the coupling layer contacting the at least one micro LED, control the first laser to irradiate the first laser light toward the at least one micro LED, and subsequently control the second laser to irradiate the second laser light toward the at least one micro LED.

A semiconductor chip including a semiconductor substrate having a first surface and a second surface and having an active layer in a region adjacent to the first surface, a first through electrode penetrating at least a portion of the semiconductor substrate and connected to the active layer, a second through electrode located at a greater radial location from the center of the semiconductor substrate than the first through electrode, penetrating at least a portion of the semiconductor substrate, and connected to the active layer. The semiconductor chip also including a first chip connection pad having a first height and a first width, located on the second surface of the semiconductor substrate, and connected to the first through electrode, and a second chip connection pad having a second height greater than the first height and a second width greater than the first width, located on the second surface of the semiconductor substrate, and connected to the second through electrode.

An electronic package and a manufacturing method thereof, which embeds an electronic structure acting as an auxiliary functional component and a plurality of conductive pillars in an encapsulation layer, and disposes an electronic component on the encapsulation layer, so as to facilitate electrical transmission with the electronic component in a close range.

A package structure is provided. The package structure includes a lower semiconductor die and a first protective layer surrounding the lower semiconductor die. The package structure also includes a dielectric layer partially covering the first protective layer and the lower semiconductor die and an upper semiconductor die over the lower semiconductor die and the first protective layer. The upper semiconductor die is bonded with the lower semiconductor die through a connector. The package structure further includes an insulating film surrounding the connector and a second protective layer surrounding the upper semiconductor die. A portion of the second protective layer is between the insulating film and the dielectric layer.

A semiconductor structure includes a first semiconductor package, a second semiconductor package, a heat spreader and an underfill layer. The first semiconductor package includes a plurality of lower semiconductor chips and a first dielectric encapsulation layer disposed around the plurality of the lower semiconductor chips. The second semiconductor package is disposed over and corresponds to one of the plurality of lower semiconductor chips, wherein the second semiconductor package includes a plurality of upper semiconductor chips and a second dielectric encapsulation layer disposed around the plurality of upper semiconductor chips. The heat spreader is disposed over and corresponds to another of the plurality of lower semiconductor chips. The underfill layer is disposed over the first semiconductor package and around the second semiconductor package and the heat spreader.

An electrically non-conducting film (109) comprising an oligomer comprising an arylene or heteroarylene repeating unit is disposed between a chip (105), e.g. a flip-chip, and a functional layer (101), e.g. a printed circuit board, electrically connected to the chip by electrically conducting interconnects (107). The oligomer may be crosslinked.

A method for fabricating a bridge chip assembly for interconnecting two or more IC dies is provided. Each of the IC dies has a first region including first connections having a first pitch and has a second region including second connections or connection pads having a second pitch, the first pitch being greater than the second pitch. The method includes: attaching a non-conductive underfill film on an upper surface of at least the second region of each of the IC dies; bonding the second connections/connection pads of a first IC die to corresponding first connection pads/connections of a bridge chip; and bonding the second connections/connection pads of a second IC die to the bridge chip. The bridge chip assembly includes the bridge chip bonded with the first and second IC dies, and the non-conductive underfill film disposed between the bridge chip and the IC dies.

A semiconductor package may include: a first redistribution substrate; a first die above the first redistribution substrate; a second redistribution substrate on the first die; a first bump formed on the first die, and connecting the first die to the second redistribution substrate; a first molding portion enclosing the first die and surrounding the first bump; and an outer terminal on a bottom surface of the first redistribution substrate, wherein the second redistribution substrate comprises an insulating pattern and a conductive pattern in the insulating pattern to be in contact with the first bump, and wherein, at an interface of the second redistribution substrate and the first bump, the conductive pattern of the second redistribution substrate and the first bump are formed of the same material to form a single body or structure.

A method for manufacturing connection structure, the method includes arranging conductive particles and a first composite on a first electrode located on a first surface of a first member, arranging a second composite on the first electrode and a region other than the first electrode of the first surface, arranging the first surface and a second surface of a second member where a second electrode is located, so that the first electrode and the second electrode are opposed to each other, pressing the first member and the second member, and curing the first composite and the second composite.

Embodiments may relate to a microelectronic package that includes a die coupled with a package substrate. A plurality of solder thermal interface material (STIM) thermal interconnects may be coupled with the die and an integrated heat spreader (IHS) may be coupled with the plurality of STIM thermal interconnects. A thermal underfill material may be positioned between the IHS and the die such that the thermal underfill material at least partially surrounds the plurality of STIM thermal interconnects. Other embodiments may be described or claimed.