H01L2224/75263

Method and structure for die bonding using energy beam

Disclosed is a die-bonding method which provides a target substrate having a circuit structure with multiple electrical contacts and multiple semiconductor elements each semiconductor element having a pair of electrodes, arranges the multiple semiconductor elements on the target substrate with the pair of electrodes of each semiconductor element aligned with two corresponding electrical contacts of the target substrate, and applies at least one energy beam to join and electrically connect the at least one pair of electrodes of every at least one of the multiple semiconductor elements and the corresponding electrical contacts aligned therewith in a heating cycle by heat carried by the at least one energy beam in the heating cycle. The die-bonding method delivers scattering heated dots over the target substrate to avoid warpage of PCB and ensures high bonding strength between the semiconductor elements and the circuit structure of the target substrate.

SELECTIVELY BONDING LIGHT-EMITTING DEVICES VIA A PULSED LASER

The invention is directed towards enhanced systems and methods for employing a pulsed photon (or EM energy) source, such as but not limited to a laser, to electrically couple, bond, and/or affix the electrical contacts of a semiconductor device to the electrical contacts of another semiconductor devices. Full or partial rows of LEDs are electrically coupled, bonded, and/or affixed to a backplane of a display device. The LEDs may be μLEDs. The pulsed photon source is employed to irradiate the LEDs with scanning photon pulses. The EM radiation is absorbed by either the surfaces, bulk, substrate, the electrical contacts of the LED, and/or electrical contacts of the backplane to generate thermal energy that induces the bonding between the electrical contacts of the LEDs' electrical contacts and backplane's electrical contacts. The temporal and spatial profiles of the photon pulses, as well as a pulsing frequency and a scanning frequency of the photon source, are selected to control for adverse thermal effects.

REFLOW METHOD AND SYSTEM

A system for reflowing a semiconductor workpiece including a stage, a first vacuum module and a second vacuum module, and an energy source is provided. The stage includes a base and a protrusion connected to the base, the stage is movable along a height direction of the stage relative to the semiconductor workpiece, the protrusion operably holds and heats the semiconductor workpiece, and the protrusion includes a first portion and a second portion surrounded by and spatially separated from the first portion. The first vacuum module and the second vacuum module respectively coupled to the first portion and the second portion of the protrusion, and the first vacuum module and the second vacuum module are operable to respectively apply a pressure to the first portion and the second portion. The energy source is disposed over the stage to heat the semiconductor workpiece held by the protrusion of the stage.

PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
20210366864 · 2021-11-25 · ·

A package structure and a method for manufacturing a package structure are provided. The package structure includes a first wiring structure and at least one electronic device. The at least one electronic device is connected to the first wiring structure through at least two joint structures. The at least two joint structures respectively include different materials.

Apparatus and method for transferring semiconductor devices from a substrate and stacking semiconductor devices on each other
11183478 · 2021-11-23 · ·

A method of directly transferring a first semiconductor device die to a substrate includes loading a wafer tape into a first frame, loading a substrate into a second frame, arranging at least one of the first frame or the second frame such that a surface of the substrate is adjacent to a first side of the wafer tape, and orienting a needle to a position adjacent to a second side of the wafer tape, the needle extending in a direction toward the wafer tape. The method also includes activating a needle actuator connected to the needle to move the needle to a die transfer position at which the needle contacts the second side of the wafer tape to press the first semiconductor device die into contact with the second semiconductor device die.

LASER BONDING METHOD AND A SEMICONDUCTOR PACKAGE INCLUDING A BONDING PART AND A BONDING TARGET

Provides is a laser bonding method. The method includes forming a bonding part on a substrate; aligning a bonding target on the bonding part and bonding the bonding part and the bonding target. The bonding includes heating the bonding part using a laser. The bonding part formed on the substrate includes an adhesive layer and a conductive particle located in the adhesive layer.

Method for constructing micro-LED display module
11177157 · 2021-11-16 · ·

Disclosed is a method for constructing a micro-LED display module. The method includes: retaining micro-LED chips in a matrix on a chip retaining member; picking up the micro-LED chips on the chip retaining member and transferring the picked up micro-LED chips to a planar carrier member; pressing the micro-LED chips on the planar carrier member against a mount substrate; and heating solders disposed on the mount substrate above the melting point of the solders simultaneously with the pressing of the micro-LED chips against the mount substrate to bond the micro-LED chips to the mount substrate. The mount substrate is sucked by a suction chuck during heating of the solders.

High speed handling of ultra-small chips by selective laser bonding and debonding

Techniques for high speed handling of ultra-small chips (e.g., micro-chips) by selective laser bonding and/or debonding are provided. In one aspect, a method includes: providing a first wafer including chips bonded to a surface thereof; contacting the first wafer with a second wafer, the second wafer including a substrate bonded to a surface thereof, wherein the contacting aligns individual chips with bonding sites on the substrate; and debonding the individual chips from the first wafer using a debonding laser having a small spot size of about 0.5 μm to about 100 μm, and ranges therebetween. A system is also provided that has digital cameras, a motorized XYZ-axis stage, and a computer control system configured to i) control a spot size of the at least one laser source and ii) adjust a positioning of the sample to align individual chips with a target area of the laser.

Micro-heaters in a film structure mounted on a substrate between a plurality of electronic components
11222833 · 2022-01-11 · ·

A film structure, a chip carrier assembly, and a chip carrier device are provided. The film structure includes a film and a plurality of micro-heaters. In which, the film is applied on a substrate, and the plurality of micro-heaters is disposed on top of the film or in the film. The chip carrier assembly includes a circuit substrate and the film structure. In which, the circuit substrate carries a plurality of chips. The chip carrier device includes the chip carrier assembly and a suction unit. In which, the suction unit is arranged above the chip carrier assembly to attach on and transfer the plurality of chips to the circuit substrate. The chips are disposed on the circuit substrate through solder balls, and the micro-heaters heat the solder balls that are in contact with the chips.

MOUNTING DEVICE AND MOUNTING METHOD
20210351057 · 2021-11-11 ·

a mounting device and a mounting method is provided with which, after lowering a mounting head holding a chip component in a direction perpendicular to a substrate to bring the chip component into close contact with the substrate subsequent to positioning the chip component and the substrate, a control unit causes a recognition mechanism to start a parallel recognition operation of a chip recognition mark and a substrate recognition mark and recognize the chip recognition mark and the substrate recognition mark through the mounting head in a mounted state in which the chip component is in close contact with the substrate, and calculates mounting position accuracy of the chip component and the substrate.