H01L2224/80012

STRUCTURES FOR BONDING ELEMENTS INCLUDING CONDUCTIVE INTERFACE FEATURES

A bonded structure is disclosed. The bonded structure includes a first element and a second element that is bonded to the first element along a bonding interface. The bonding interface has an elongate conductive interface feature and a nonconductive interface feature. The bonded structure also includes an integrated device that is coupled to or formed with the first element or the second element. The elongate conductive interface feature has a recess through a portion of a thickness of the elongate conductive interface feature. A portion of the nonconductive interface feature is disposed in the recess.

Substrate bonding apparatus and substrate bonding method

A substrate bonding apparatus includes a vacuum chamber, a surface activation part for activating respective bonding surfaces of a first substrate and a second substrate, and stage moving mechanisms for bringing the two bonding surfaces into contact with each other, to thereby bond the substrates. In order to activate the bonding surfaces in the vacuum chamber, the bonding surfaces are irradiated with a particle beam for activating the bonding surfaces, and concurrently the bonding surfaces are also irradiated with silicon particles. It is thereby possible to increase the bonding strength of the substrates.

Wafer bonding process and structure

A semiconductor device and a method of fabricating the same are introduced. In an embodiment, one or more passivation layers are formed over a first substrate. Recesses are formed in the passivation layers and one or more conductive pads are formed in the recesses. One or more barrier layers are formed between the passivation layers and the conductive pads. The conductive pads of the first substrate are aligned to the conductive pads of a second substrate and are bonded using a direct bonding method.

Wafer bonding process and structure

A semiconductor device and a method of fabricating the same are introduced. In an embodiment, one or more passivation layers are formed over a first substrate. Recesses are formed in the passivation layers and one or more conductive pads are formed in the recesses. One or more barrier layers are formed between the passivation layers and the conductive pads. The conductive pads of the first substrate are aligned to the conductive pads of a second substrate and are bonded using a direct bonding method.

Die Processing
20180308819 · 2018-10-25 ·

Representative implementations provide techniques and systems for processing integrated circuit (IC) dies. Dies being prepared for intimate surface bonding (to other dies, to substrates, to another surface, etc.) may be processed with a minimum of handling, to prevent contamination of the surfaces or the edges of the dies. The techniques include processing dies while the dies are on a dicing sheet or other device processing film or surface. Systems include integrated cleaning components arranged to perform multiple cleaning processes simultaneously.

3D integrated circuit device

A 3D integrated circuit device, including: a first transistor; a second transistor; and a third transistor, where the third transistor is overlaying the second transistor and the second transistor is overlaying the first transistor, where the first transistor controls the supply of a ground or a power signal to the third transistor, and where the first transistor, the second transistor and the third transistor are aligned to each other with less than 100 nm misalignment.

3D integrated circuit device

A 3D integrated circuit device, including: a first transistor; a second transistor; and a third transistor, where the third transistor is overlaying the second transistor and the second transistor is overlaying the first transistor, where the first transistor controls the supply of a ground or a power signal to the third transistor, and where the first transistor, the second transistor and the third transistor are aligned to each other with less than 100 nm misalignment.

TECHNIQUES FOR PROCESSING DEVICES

Representative techniques provide process steps for forming a microelectronic assembly, including preparing microelectronic components such as dies, wafers, substrates, and the like, for bonding. One or more surfaces of the microelectronic components are formed and prepared as bonding surfaces. The microelectronic components are stacked and bonded without adhesive at the prepared bonding surfaces.

Hybrid bonding system and cleaning method thereof

A method of cleaning an apparatus for processing a semiconductor wafer includes providing a first device having a first surface configured to load a first semiconductor wafer, a second device having a second surface configured to load a second semiconductor wafer, and a first cleaning module; and cleaning the second surface by moving the first cleaning module across the second surface in a first direction with respect to the second device.

SUBSTRATE BONDING APPARATUS AND SUBSTRATE BONDING METHOD

A substrate bonding apparatus includes a vacuum chamber, a surface activation part for activating respective bonding surfaces of a first substrate and a second substrate, and stage moving mechanisms for bringing the two bonding surfaces into contact with each other, to thereby bond the substrates. In order to activate the bonding surfaces in the vacuum chamber, the bonding surfaces are irradiated with a particle beam for activating the bonding surfaces, and concurrently the bonding surfaces are also irradiated with silicon particles. It is thereby possible to increase the bonding strength of the substrates.