A substrate bonding apparatus (100) includes a vacuum chamber (200), a surface activation part (610) for activating respective bonding surfaces of a first substrate (301) and a second substrate (302), and stage moving mechanisms (403, 404) for bringing the two bonding surfaces into contact with each other, to thereby bond the substrates (301, 302). In order to activate the bonding surfaces in the vacuum chamber (200), the bonding surfaces are irradiated with a particle beam for activating the bonding surfaces, and concurrently the bonding surfaces are also irradiated with silicon particles. It is thereby possible to increase the bonding strength of the substrates (301, 302).

A bonding apparatus including a head configured to bond a second object to a first object, a first camera configured to obtain an image by capturing the second object held by the head, and a control unit configured to determine a state of a bonding surface of the second object on a side of the first object based on an image obtained by the first camera in a state in which the second object is aligned with respect to the head, and control the head not to bond the second object held by the head to the first object if the state of the bonding surface is poor, and to bond the second object held by the head to the first object if the state of the bonding surface is excellent.

An Integrated Circuit device, including: a first layer including first transistors; and a second layer including second transistors overlaying the first layer, where the first transistors are facing down and the second transistors are facing up, and where the second layer includes a through layer via of less than 300 nm diameter.

An Integrated Circuit device, including: a first layer including first transistors; and a second layer including second transistors overlaying the first layer, where the first transistors are facing down and the second transistors are facing up, and where the second layer includes a through layer via of less than 300 nm diameter.

A heterogeneous chip stacking structure includes a first chip and a second chip. The first chip has a plurality of first convex pillar structures gradually formed outward from the first chip within a first predetermined time, and each of the first convex pillar structures has a first bonding pad portion. The second chip has a plurality of second convex pillar structures gradually formed outward from the second chip within a second predetermined time, and each of the second convex pillar structures has a second bonding pad portion. The first chip is configured to be disposed on the second chip, and the first bonding pad portions of the first convex pillar structures of the first chip and the second bonding pad portions of the second convex pillar structures of the second chip are in direct contact with each other and tightly coupled with each other, respectively.

A heterogeneous chip stacking method includes providing a first chip, in which the first chip has a plurality of first convex pillar structures, and each first convex pillar structure has a first bonding pad portion; providing a second chip different from the first chip, in which the second chip has a plurality of second convex pillar structures, and each second convex pillar structures having a second bonding pad portion; placing the first chip on the second chip, in which the first bonding pad portions of the first convex pillar structures and the second bonding pad portions of the second convex pillar structures are in direct contact with each other respectively; and then applying at least one of a predetermined pressure, a predetermined temperature, and a predetermined ultrasonic frequency to tightly couple the first bonding pad portions and the second bonding pad portions with each other respectively.

A heterogeneous chip stacking device includes a substrate carrying structure, a position-limiting substrate structure, a first cover structure, a second cover structure and a chip carrying structure. The position-limiting substrate structure is detachably disposed on the substrate carrying structure. The first cover structure is detachably disposed above the position-limiting substrate structure. The second cover structure is detachably disposed on the first cover structure. The chip carrying structure is movably disposed above the substrate carrying structure. The position-limiting substrate structure has a plurality of position-limiting grooves for respectively accommodating a plurality of first chips. The first cover structure is disposed on the first chips to press the first chips, and the first cover structure has a plurality of first openings configured to respectively accommodate a plurality of second chips. The second cover structure has a plurality of second openings configured to respectively communicate with the first openings.

A substrate bonding apparatus (100) includes a vacuum chamber (200), a surface activation part (610) for activating respective bonding surfaces of a first substrate (301) and a second substrate (302), and stage moving mechanisms (403, 404) for bringing the two bonding surfaces into contact with each other, to thereby bond the substrates (301, 302). In order to activate the bonding surfaces in the vacuum chamber (200), the bonding surfaces are irradiated with a particle beam for activating the bonding surfaces, and concurrently the bonding surfaces are also irradiated with silicon particles. It is thereby possible to increase the bonding strength of the substrates (301, 302).

A method includes performing a cleaning process on a first surface of a first wafer, and performing a surface activation process on the first surface. The surface activation process is selected from the group consisting of: a plasma surface activation process comprising generating a plasma from a process gas, wherein ions in the plasma are removed using a filter, and wherein a remaining uncharged part of the plasma is used to treat the first surface; a laser surface activation process using a laser beam; an acid surface activation process using an acid; and an alkali surface activation process using an alkali. After the surface activation process, a rinsing process is performed on the first surface. The first surface of the first wafer is bonded to a second surface of a second wafer.

Representative implementations provide techniques and systems for processing integrated circuit (IC) dies. Dies being prepared for intimate surface bonding (to other dies, to substrates, to another surface, etc.) may be processed with a minimum of handling, to prevent contamination of the surfaces or the edges of the dies. The techniques include processing dies while the dies are on a dicing sheet or other device processing film or surface. Systems include integrated cleaning components arranged to perform multiple cleaning processes simultaneously.