Patent classifications
H01L2224/80203
GUIDE APPARATUS FOR TRANSFERRING LIGHT-EMITTING DEVICES ONTO A SUBSTRATE AND METHOD APPLYING THE SAME
A guide apparatus configured to transfer light-emitting devices in a liquid onto a substrate is provided. The guide apparatus includes a base configured to support the substrate; and a guide member configured to couple with the base to be seated on a mounting surface of the substrate in a state in which the substrate is supported on a surface of the base, wherein the guide member includes guide holes configured to respectively guide the light-emitting devices in the liquid to be disposed on the mounting surface of the substrate.
BONDING APPARATUS AND BONDING METHOD
A bonding apparatus includes a first holder, a second holder, a first interferometer, a housing, a gas supply and an airflow control cover. The first holder attracts and holds the first substrate. The second holder attracts and holds the second substrate. The first interferometer measures, by radiating light to the second holder or a first object which is moved along with the second holder in the first horizontal direction, a distance to the second holder or the first object in the first horizontal direction. The housing accommodates therein the first holder, the second holder and the first interferometer. The gas supply is provided at a lateral side of the housing, and supplies a gas into the housing. The airflow control cover is provided within the housing, and redirects a part of a flow of the gas supplied from the gas supply toward a first path of the light.
BONDING APPARATUS AND BONDING METHOD
A bonding apparatus includes a first holder, a second holder, a first interferometer, a housing, a gas supply and an airflow control cover. The first holder attracts and holds the first substrate. The second holder attracts and holds the second substrate. The first interferometer measures, by radiating light to the second holder or a first object which is moved along with the second holder in the first horizontal direction, a distance to the second holder or the first object in the first horizontal direction. The housing accommodates therein the first holder, the second holder and the first interferometer. The gas supply is provided at a lateral side of the housing, and supplies a gas into the housing. The airflow control cover is provided within the housing, and redirects a part of a flow of the gas supplied from the gas supply toward a first path of the light.
Stacked semiconductor package
A semiconductor package includes a substrate, a first semiconductor chip disposed on the substrate, and a second semiconductor chip disposed on a top surface of the first semiconductor chip. The first semiconductor chip includes a conductive pattern disposed on the top surface of the first semiconductor chip and a first protective layer covering the top surface of the first semiconductor chip and at least partially surrounds the conductive pattern. The second semiconductor chip includes a first pad that contacts a first through electrode on a bottom surface of the second semiconductor chip. A second protective layer surrounds the first pad and covers the bottom surface of the second semiconductor chip. A third protection layer fills a first recess defined in the second protective layer to face the inside of the second protective layer. The first protective layer and the third protective layer contact each other.
SEMICONDUCTOR DEVICE WITH STACKED DIES AND METHOD FOR FABRICATING THE SAME
The present application discloses a semiconductor device with stacked dies and the method for fabricating the semiconductor device with the stacked dies. The semiconductor device includes a first semiconductor die including a first substrate including a first and a second region, a first circuit layer on the first substrate, a control circuit on the first region and in the first circuit layer; and through die vias along the first circuit layer and the second region; a second semiconductor die stacked on the first semiconductor die and including second conductive pads connected to the through die vias and the control circuit; and a third semiconductor die stacked under the first semiconductor die and including third conductive pads connected to the through die vias and the control circuit. The through die vias, the second conductive pads, and the third conductive pads configure transmission channels through which the control circuit is capable to access the second and the third semiconductor die.
Microelectronic devices, related electronic systems, and methods of forming microelectronic devices
A microelectronic device comprises a first die comprising a memory array region comprising a stack structure comprising vertically alternating conductive structures and insulative structures, and vertically extending strings of memory cells within the stack structure. The first die further comprises first control logic region comprising a first control logic devices including at least a word line driver. The microelectronic device further comprise a second die attached to the first die, the second die comprising a second control logic region comprising second control logic devices including at least one page buffer device configured to effectuate a portion of control operations of the vertically extending string of memory cells. Related microelectronic devices, electronic systems, and methods are also described.
Microelectronic devices, related electronic systems, and methods of forming microelectronic devices
A microelectronic device comprises a first die comprising a memory array region comprising a stack structure comprising vertically alternating conductive structures and insulative structures, and vertically extending strings of memory cells within the stack structure. The first die further comprises first control logic region comprising a first control logic devices including at least a word line driver. The microelectronic device further comprise a second die attached to the first die, the second die comprising a second control logic region comprising second control logic devices including at least one page buffer device configured to effectuate a portion of control operations of the vertically extending string of memory cells. Related microelectronic devices, electronic systems, and methods are also described.
SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME
A semiconductor package includes a substrate, a die stack on the substrate, and connection terminals between the substrate and the die stack. The die stack includes a first die having a first active surface facing the substrate, the first die including first through electrodes vertically penetrating the first die, a second die on the first die and having a second active surface, the second die including second through electrodes vertically penetrating the second die, and a third die on the second die and having a third active surface facing the substrate. The second active surface of the second die is in direct contact with one of the first or third active surfaces.
BONDING METHOD
The inventive concept provides a bonding method. The bonding method includes bonding a second bonding object to a first bonding object, which is a bonding step; providing a protective agent to a region of the first bonding object which is not bonded to the second bonding object, which is a protective agent providing step; and etching a backside of the second bonding object, which is an etching step.
BONDING METHOD, BONDED ARTICLE, AND BONDING DEVICE
A bonding device measures a position deviation amount of the chip with respect to the substrate in a state where the chip and the substrate are in contact, and corrects and moves the chip relatively to the substrate in such a way as to reduce the position deviation amount, based on the measured position deviation amount. Then, the bonding device fixes the chip to the substrate by irradiating a resin portion of the chip with an ultraviolet ray and curing the resin portion when the position deviation amount of the chip with respect to the substrate is equal to or less than a position deviation amount threshold value.