H01L2224/80805

Semiconductor Devices with System on Chip Devices

A semiconductor device and method of manufacture are provided wherein the semiconductor device includes a first system on chip device bonded to a first memory device, a second system on chip device bonded to the first memory device, a first encapsulant surrounding the first system on chip device and the second system on chip device, a second encapsulant surrounding the first system on chip device, the second system on chip device, and the first memory device, and a through via extending from a first side of the second encapsulant to a second side of the first encapsulant, the through via being located outside of the first encapsulant.

Bonding process with inhibited oxide formation

First and second contacts are formed on first and second wafers from disparate first and second conductive materials, at least one of which is subject to surface oxidation when exposed to air. A layer of oxide-inhibiting material is disposed over a bonding surface of the first contact and the first and second wafers are positioned relative to one another such that a bonding surface of the second contact is in physical contact with the layer of oxide-inhibiting material. Thereafter, the first and second contacts and the layer of oxide-inhibiting material are heated to a temperature that renders the first and second contacts and the layer of oxide-inhibiting material to liquid phases such that at least the first and second contacts alloy into a eutectic bond.

Eutectic Electrode Structure of Flip-chip LED Chip and Flip-chip LED Chip

A light emitting diode includes: a light emitting layer arranged on at least part of a first semiconductor layer, and a second semiconductor layer; a local defect region over a portion of the second semiconductor layer and extending downward to the first semiconductor layer; a metal layer over a portion of the second semiconductor layer; an insulating layer covering the metal layer, the second and first semiconductor layers in the local defect region, with opening structures over the local defect region and the metal layer, respectively; and an electrode structure over the insulating layer and having a first layer and a second layer, and including a first-type electrode region and a second-type electrode region; wherein an upper surface and a lower surface of the first layer are not flat, and a lower surface of the second layer are both flat.

METHODS AND APPARATUS TO EMBED HOST DIES IN A SUBSTRATE

Methods and apparatus to embed host dies in a substrate are disclosed An apparatus includes a first die having a first side and a second side opposite the first side. The first side includes a first contact to be electrically coupled with a second die. The second side includes a second contact. The apparatus further includes a substrate including a metal layer and a dielectric material on the metal layer. The first die is encapsulated within the dielectric material. The second contact of the first die is bonded to the metal layer independent of an adhesive.

MULTI-CHIP PACKAGE HAVING STRESS RELIEF STRUCTURE
20220352119 · 2022-11-03 ·

A semiconductor device includes a package substrate, and a first die group bonded onto the package substrate. The first die group characterized by a first thickness. The semiconductor device also has a second die group bonded onto the package substrate. The second die group characterized by a second thickness. The semiconductor device further includes a carrier substrate disposed on the first die group. The carrier substrate is characterized by a third thickness that is a function of a difference between the first thickness and the second thickness. A molding compound material is disposed on the package substrate and covers the first die group and the second die group. The molding compound material includes a cavity between the first die group and the second die group.

MICRO LIGHT-EMITTING DIODE DISPLAY PANEL AND MANUFACTURING METHOD THEREFOR
20220344315 · 2022-10-27 · ·

A manufacturing method fora micro light-emitting diode (LED) display panel includes: providing a base substrate carrying a plurality of LED dies, each LED die including a first semiconductor layer, a light-emitting material layer, a second semiconductor layer and a first conductive layer, the first semiconductor layer being bonded with the base substrate through a sacrificial layer, a material of the sacrificial layer being decomposable under laser irradiation; providing a backplane having a plurality of bonding structures; bonding at least some LED dies of the plurality of LED dies to at least some of the plurality of bonding structures through respective first conductive layers; and peeling each of the at least some LED dies from the base substrate through laser lift-off.

Package-on-package device

A package includes a redistribution structure, a die package on a first side of the redistribution structure including a first die connected to a second die by metal-to-metal bonding and dielectric-to-dielectric bonding, a dielectric material over the first die and the second die and surrounding the first die, and a first through via extending through the dielectric material and connected to the first die and a first via of the redistribution structure, a semiconductor device on the first side of the redistribution structure includes a conductive connector, wherein a second via of the redistribution structure contacts the conductive connector of the semiconductor device, a first molding material on the redistribution structure and surrounding the die package and the semiconductor device, and a package through via extending through the first molding material to contact a third via of the redistribution structure.

NANOWIRE LED, DISPLAY MODULE INCLUDING THE NANOWIRE LED, AND METHOD FOR MANUFACTURING THE DISPLAY MODULE

A nanowire LED, a display module including the nanowire LED, and a method for manufacturing the display module are provided. The method for manufacturing a display module includes forming a template layer including a magnetic layer on a silicon substrate, growing a plurality of nanowire LEDs on the template layer, separating the plurality of nanowire LEDs from the template layer by ultrasonic waves, forming a plurality of unit cells in a state in which the plurality of nanowire LEDs are aligned to have a specific directivity, forming a plurality of unit pixels by transferring the plurality of unit cells onto a unit substrate, arranging the plurality of unit pixels on a thin film transistor (TFT) substrate through a fluidic self-assembly, and bonding the plurality of unit pixels to be connected to an electrode of the TFT substrate.

DISPLAY PANEL AND MANUFACTURING METHOD THEREOF

A display panel includes a substrate, light-emitting diodes, and a cured opaque encapsulant layer. The light-emitting diodes are disposed on a first surface of the substrate. The cured opaque encapsulant layer is disposed on the first surface and a side surface of the substrate, and surrounds the light emitting diodes. A second surface of the cured opaque encapsulant layer facing away from the substrate is a rough surface.

Methods of packaging semiconductor devices and packaged semiconductor devices

Packaged semiconductor devices are disclosed. In some embodiments, a packaged semiconductor device includes a substrate and a plurality of integrated circuit dies coupled to the substrate. The device also includes a molding material disposed over the substrate between adjacent ones of the plurality of integrated circuit dies. A cap layer is disposed over the molding material and the plurality of integrated circuit dies, wherein the cap layer comprises an electrically conductive material that directly contacts the molding material and each of the plurality of integrated circuit dies.