An integrated circuit device includes a memory including a memory cell insulation surrounding a memory stack and a memory cell interconnection unit, a peripheral circuit including a peripheral circuit region formed on a peripheral circuit board, and a peripheral circuit interconnection between the peripheral circuit region and the memory structure, a plurality of conductive bonding structures on a boundary between the memory cell interconnection and the peripheral circuit interconnection in a first region, the first region overlapping the memory stack in a vertical direction, and a through electrode penetrating one of the memory cell insulation and the peripheral circuit board and extended to a lower conductive pattern included in the peripheral circuit interconnection in a second region, the second region overlapping the memory cell insulation in the vertical direction.

A printed structure comprises a device comprising device electrical contacts disposed on a common side of the device and a substrate non-native to the device comprising substrate electrical contacts disposed on a surface of the substrate. At least one of the substrate electrical contacts has a rounded shape. The device electrical contacts are in physical and electrical contact with corresponding substrate electrical contacts. The substrate electrical contacts can comprise a polymer core coated with a patterned contact electrical conductor on a surface of the polymer core. A method of making polymer cores comprising patterning a polymer on the substrate and reflowing the patterned polymer to form one or more rounded shapes of the polymer and coating and then patterning the one or more rounded shapes with a conductive material.

An integrated circuit device includes a memory including a memory cell insulation surrounding a memory stack and a memory cell interconnection unit, a peripheral circuit including a peripheral circuit region formed on a peripheral circuit board, and a peripheral circuit interconnection between the peripheral circuit region and the memory structure, a plurality of conductive bonding structures on a boundary between the memory cell interconnection and the peripheral circuit interconnection in a first region, the first region overlapping the memory stack in a vertical direction, and a through electrode penetrating one of the memory cell insulation and the peripheral circuit board and extended to a lower conductive pattern included in the peripheral circuit interconnection in a second region, the second region overlapping the memory cell insulation in the vertical direction.

A printed structure comprises a device comprising device electrical contacts disposed on a common side of the device and a substrate non-native to the device comprising substrate electrical contacts disposed on a surface of the substrate. At least one of the substrate electrical contacts has a rounded shape. The device electrical contacts are in physical and electrical contact with corresponding substrate electrical contacts. The substrate electrical contacts can comprise a polymer core coated with a patterned contact electrical conductor on a surface of the polymer core. A method of making polymer cores comprising patterning a polymer on the substrate and reflowing the patterned polymer to form one or more rounded shapes of the polymer and coating and then patterning the one or more rounded shapes with a conductive material.

A semiconductor device is provided. The semiconductor device includes a first wafer having an array transistor formed therein, and a second wafer having a capacitor structure formed therein. The semiconductor device also includes a bonding interface formed between the first wafer and second wafer that includes a plurality of bonding structures. The bonding structures are configured to couple the array transistor to the capacitor structure to form a memory cell.

An apparatus includes a transfer mechanism to transfer an electrically-actuatable element directly from a wafer tape to a transfer location on a circuit trace on a product substrate. The transfer mechanism includes one or more transfer wires. Two or more stabilizers disposed on either side of the one or more transfer wires. A needle actuator is connected to the one or more transfer wires and the two or more stabilizers to move the one or more transfer wires and the two or more stabilizers to a die transfer position.

A method of forming an integrated circuit package includes attaching a first die to an interposer. The interposer includes a first die connector and a second die connector on the interposer and a first dielectric layer covering at least one sidewall of the first die connector and at least one sidewall of the second die connector. The first die is coupled to the first die connector and to the first dielectric layer and the second die connector is exposed by the first die. The method further includes recessing the first dielectric layer to expose at least one sidewall of the second die connector and attaching a second die to the interposer, the second die being coupled to the second die connector.

A method includes determining a first offset between a first alignment mark on a first side of a first wafer and a second alignment mark on a second side of the first wafer; aligning the first alignment mark of the first wafer to a third alignment mark on a first side of a second wafer, which includes detecting a location of the second alignment mark of the first wafer; determining a location of the first alignment mark of the first wafer based on the first offset and the location of the second alignment mark of the first wafer; and, based on the determined location of the first alignment mark, repositioning the first wafer to align the first alignment mark to the third alignment mark; and bonding the first side of the first wafer to the first side of the second wafer to form a bonded structure.

An apparatus includes a transfer mechanism to transfer an electrically-actuatable element directly from a wafer tape to a transfer location on a circuit trace on a product substrate. The transfer mechanism includes one or more transfer wires. Two or more stabilizers disposed on either side of the one or more transfer wires. A needle actuator is connected to the one or more transfer wires and the two or more stabilizers to move the one or more transfer wires and the two or more stabilizers to a die transfer position.

In some embodiments, the present disclosure relates to an integrated chip structure. The integrated chip structure includes a first integrated chip (IC) tier and a second IC tier. The second IC tier comprises a second plurality of conductors within a second insulating structure disposed on the second semiconductor body. A conductive pad is electrically coupled to the second plurality of conductors and has a conductive surface available to a side of the second semiconductor body facing away from the first semiconductor body. The IC first tier contacts the second IC tier along a bonding interface including one or more conductive regions and one or more insulating regions. The one or more conductive regions laterally outside of a bottom surface of the conductive pad.