Patent classifications
H01L2224/81047
Method for producing semiconductor package
A method for producing a semiconductor package is a method for producing a semiconductor package in which a plurality of semiconductor chips, each of which includes a substrate, conductive portions formed on the substrate, and microbumps formed on the conductive portions, are laminated, which includes a heating process of causing a reducing gas to flow in an inert atmosphere into a space where the semiconductor chips are arranged and heated at or higher than a temperature of a melting point of the microbump, and in the heating process, a pressure application member is mounted on the microbump.
METHOD FOR PRODUCING SEMICONDUCTOR PACKAGE
A method for producing a semiconductor package is a method for producing a semiconductor package in which a plurality of semiconductor chips, each of which includes a substrate, conductive portions formed on the substrate, and microbumps formed on the conductive portions, are laminated, which includes a heating process of causing a reducing gas to flow in an inert atmosphere into a space where the semiconductor chips are arranged and heated at or higher than a temperature of a melting point of the microbump, and in the heating process, a pressure application member is mounted on the microbump.
PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF
A package structure includes a semiconductor substrate, an under bump metallurgy layer, and at least one bump. The under bump metallurgy layer is disposed on the semiconductor substrate. The bump is disposed on the under bump metallurgy layer, and the bump includes a first portion and a second portion under the first portion, wherein a top surface of the first portion of the bump includes a flat portion and a rounded portion.
Chip package structure with nickel layer
A chip package structure is provided. The chip package structure includes a wiring substrate including a substrate, a first pad, and a second pad. The first pad and the second pad are respectively over a first surface and a second surface of the substrate, and the first pad is narrower than the second pad. The chip package structure includes a nickel layer over the first pad. The nickel layer has a T-shape in a cross-sectional view of the nickel layer. The chip package structure includes a chip over the wiring substrate. The chip package structure includes a conductive bump between the nickel layer and the chip.
CHIP PACKAGE STRUCTURE WITH NICKEL LAYER
A chip package structure is provided. The chip package structure includes a wiring substrate having a pad and a conductive adhesive layer over the pad and having a first inner wall, a second inner wall, a first sidewall, and a second sidewall. The first inner wall and the second inner wall face each other, and the first sidewall and the second sidewall are opposite to each other. The chip package structure also includes a nickel layer over the conductive adhesive layer, and the nickel layer covers the first inner wall, the second inner wall, the first sidewall, and the second sidewall of the conductive adhesive layer. The chip package structure further includes a chip over the wiring substrate and a conductive bump connected between the nickel layer and the chip.
BONDING METHOD AND BONDED BODY
A bonding method of a first member and a second member includes: forming a first wire bonding bump (12) on a first electrode (14) arranged in the first member; forming a second wire bonding bump (22) on a second electrode 24 arranged in the second member; and flattening a tip section of the second wire bonding bump to form a bump flat surface (221). The tip section (120) of the first wire bonding bump and the bump flat surface (221) are pressure bonded to each other.
Method of manufacturing an electronic device, and electronic device manufacturing apparatus
According to this disclosure, a method of manufacturing an electronic device is provided, which includes exposing a top surface of a first electrode of a first electronic component to organic acid, irradiating the top surface of the first electrode exposed to the organic acid with ultraviolet light, and bonding the first electrode and a second electrode of a second electronic component by heating and pressing the first electrode and the second electrode each other.
Micro-scrub process for fluxless micro-bump bonding
A fluxless bonding process is provided. An array of micro solder bumps of a first semiconductor structure is aligned to an array of bonding pads of a second semiconductor structure under an applied bonding force. An environment is provided to prevent oxides from forming on the solder bump structures and bonding pads during the bonding process. A scrubbing process is performed at a given scrubbing frequency and amplitude to scrub the micro solder bumps against the bonding pads in a direction perpendicular to the bonding. Heat is applied to at least the first semiconductor structure to melt and bond the micro solder bumps to the bonding pads. The first semiconductor structure is cooled down to solidify the molten solder. Coplanarity is maintained between the bonding surfaces of the semiconductor structures within a given tolerance during the scrubbing and cooling steps until solidification of the micro solder bumps.
SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
A method of manufacturing a semiconductor package is provided. The method includes: forming a plurality of sacrificial pads on a carrier substrate and a plurality of sacrificial solder bumps on the plurality of sacrificial pads, respectively; forming a plurality of conductive pillars and a protective insulating layer on a semiconductor chip, the protective insulating layer surrounding a side surface of each of the plurality of conductive pillars; polishing the plurality of conductive pillars and the protective insulating layer to obtain a polished surface in which a surface of each of the plurality of conductive pillars is coplanar with a surface of the protective insulating layer; and bonding the plurality of conductive pillars to the plurality of sacrificial solder bumps, respectively.
Flip-chip bonding method and solid-state image pickup device manufacturing method characterized in including flip-chip bonding method
An electrode of an electronic component element (1) is bonded to an electrode (5) of a substrate (4) via a bump (2) by: after applying, to the bump (2), only a first pressure which is not less than a yield stress of a bulk material of which the bump (2) is made, reducing or stopping the application of the first pressure; and while applying a given ultrasonic vibration to the bump (2), gradually applying a pressure to the bump (2) until the pressure reaches a second pressure which is not less than the yield stress of the bulk material of which the bump (2) is made.