H01L2224/81065

METHODS OF BONDING OF SEMICONDUCTOR ELEMENTS TO SUBSTRATES, AND RELATED BONDING SYSTEMS
20210391297 · 2021-12-16 ·

A bonding system for bonding a semiconductor element to a substrate is provided. The bonding system includes a substrate oxide reduction chamber configured to receive a substrate. The substrate includes a plurality of first electrically conductive structures. The substrate oxide reduction chamber is configured to receive a reducing gas to contact each of the plurality of first electrically conductive structures. The bonding system also includes a substrate oxide prevention chamber for receiving the substrate after the reducing gas contacts the plurality of first electrically conductive structures. The substrate oxide prevention chamber has an inert environment when receiving the substrate. The bonding system also includes a reducing gas delivery system for providing a reducing gas environment during bonding of a semiconductor element to the substrate.

METHODS OF BONDING OF SEMICONDUCTOR ELEMENTS TO SUBSTRATES, AND RELATED BONDING SYSTEMS
20210391297 · 2021-12-16 ·

A bonding system for bonding a semiconductor element to a substrate is provided. The bonding system includes a substrate oxide reduction chamber configured to receive a substrate. The substrate includes a plurality of first electrically conductive structures. The substrate oxide reduction chamber is configured to receive a reducing gas to contact each of the plurality of first electrically conductive structures. The bonding system also includes a substrate oxide prevention chamber for receiving the substrate after the reducing gas contacts the plurality of first electrically conductive structures. The substrate oxide prevention chamber has an inert environment when receiving the substrate. The bonding system also includes a reducing gas delivery system for providing a reducing gas environment during bonding of a semiconductor element to the substrate.

METHOD FOR MANUFACTURING STRUCTURE
20220165619 · 2022-05-26 · ·

Provided is a method of manufacturing a structure that can be easily bonded to a bonding target. The method of manufacturing a structure includes: a conductive layer forming step of forming a conductive layer having conductivity on a part of a surface of an insulating support including at least one surface; a valve metal layer forming step of forming a valve metal layer that covers at least a part of the conductive layer; an anodic oxidation film forming step of forming an anodic oxidation film by performing an anodization treatment on the valve metal layer in a region on the conductive layer using the conductive layer as an electrode; a micropore forming step of forming a plurality of micropores that extend in a thickness direction on the anodic oxidation film; and a filling step of filling the micropores with a conductive material, in which a valve metal layer removing step of removing the valve metal layer having undergone the anodic oxidation film forming step is performed between the anodic oxidation film forming step and the filling step.

Bonding with pre-deoxide process and apparatus for performing the same

A method includes picking up a first package component, removing an oxide layer on an electrical connector of the first package component, placing the first package component on a second package component after the oxide layer is removed, and bonding the first package component to the second package component.

Solder reflow oven for batch processing

A solder reflow oven may include a reflow chamber and a plurality of vertically spaced apart wafer-support plates positioned in the reflow chamber. A plurality of semiconductor wafers each including a solder are configured to be disposed in the reflow chamber such that each semiconductor wafer is disposed proximate to, and vertically spaced apart from, a wafer-support plate. Each wafer-support plate may include at least one of liquid-flow channels or resistive heating elements. A control system control the flow of a hot liquid through the channels or activate the heating elements to heat a wafer to a temperature above the solder reflow temperature.

METHODS OF MONITORING GAS BYPRODUCTS OF A BONDING SYSTEM, AND RELATED MONITORING SYSTEMS AND BONDING SYSTEMS
20230260953 · 2023-08-17 ·

A method of monitoring gas byproducts of a bonding system is provided. The method includes: providing a plurality of bonding systems, each of the bonding systems including a reducing gas delivery system for use in connection with a bonding operation, each of the bonding systems being configured for exhausting gas byproducts; connecting each of the bonding systems to a monitoring device using a respective gas delivery path; and monitoring a composition of at least a portion of the gas byproducts with the monitoring device.

STRUCTURES FOR LOW TEMPERATURE BONDING USING NANOPARTICLES
20230335531 · 2023-10-19 ·

A method of making an assembly can include juxtaposing a top surface of a first electrically conductive element at a first surface of a first substrate with a top surface of a second electrically conductive element at a major surface of a second substrate. One of: the top surface of the first conductive element can be recessed below the first surface, or the top surface of the second conductive element can be recessed below the major surface. Electrically conductive nanoparticles can be disposed between the top surfaces of the first and second conductive elements. The conductive nanoparticles can have long dimensions smaller than 100 nanometers. The method can also include elevating a temperature at least at interfaces of the juxtaposed first and second conductive elements to a joining temperature at which the conductive nanoparticles can cause metallurgical joints to form between the juxtaposed first and second conductive elements.

Methods of bonding semiconductor elements to a substrate, including use of a reducing gas, and related bonding machines

A method of bonding a semiconductor element to a substrate includes: carrying a semiconductor element including a plurality of first electrically conductive structures with a bonding tool; supporting a substrate including a plurality of second electrically conductive structures with a support structure; providing a reducing gas in contact with each of the plurality of first conductive structures and the plurality of second conductive structures; establishing contact between corresponding ones of the plurality of first conductive structures and the plurality of second conductive structures; moving at least one of the semiconductor element and the substrate such that the corresponding ones of the plurality of first conductive structures and the plurality of second conductive structures are separated; re-establishing contact between the plurality of first conductive structures and the plurality of second conductive structures; and bonding the plurality of first conductive structures to the respective ones of the plurality of second conductive structures.

Semiconductor manufacturing apparatus

A semiconductor manufacturing method of mounting a semiconductor chip or a stacked body of semiconductor chips on a support substrate placed on a stage, determines whether a predetermined condition is satisfied during a mounting processing of the semiconductor chip or the stacked body, evacuates, together with the support substrate, the semiconductor chip or the stacked body that has mounted on the support substrate before the determination when it is determined that the predetermined condition is satisfied, determines whether to resume the mounting processing of the semiconductor chip or the stacked body after the evacuation; and returns the evacuated semiconductor chip or the evacuated stacked body to a position before the evacuation and continuing the mounting processing when it is determined that the mounting processing is resumed.

METHODS AND APPARATUS FOR STACKED DIE WARPAGE CONTROL DURING MASS REFLOW
20230282607 · 2023-09-07 ·

A semiconductor device assembly includes a die stack, a plurality of thermoset regions, and underfill material. The die stack includes at least first and second dies that each have a plurality of conductive interconnect elements on upper surfaces. A portion of the interconnect elements are connected to through-silicon vias that extend between the upper surfaces and lower surfaces of the associated dies. The plurality of thermoset regions each comprise a thin layer of thermoset material extending from the lower surface of the second die to the upper surface of the first die, and are laterally-spaced and discrete from each other. Each of the thermoset regions extends to fill an area between a plurality of adjacent interconnect elements of the first die. The underfill material fills remaining open areas between the interconnect elements of the first die.