A semiconductor package includes a first substrate, a first flow channel and a second flow channel. The first flow channel is on the first substrate. The second flow channel is on the first substrate and in fluid communication with the first flow channel. The second flow channel is spaced from an inlet and an outlet of the first flow channel. The first flow channel and the second flow channel constitute a bonding region of the first substrate.

A method of manufacturing a semiconductor memory device includes processing a first substrate including a first align mark and a first structure, processing a second substrate including a second align mark and a second structure, orientating the first substrate and the second substrate such that the first structure and the second structure face each other, and controlling alignment between the first structure and the second structure by using the first align mark and the second align mark to couple the first structure with the second structure.

An integrated circuit package substrate (ICPS) system includes a die including a first array of connectors and a substrate including a second array of connectors that is configured to be thermocompression bonded to the first array of connectors at a bonding temperature that is above a solder melting temperature. The first die is bonded to the substrate such that the first die is asymmetric with respect to a substrate center, and the second array of connectors is adjusted, at an alignment temperature that is below the solder melting temperature, for thermal expansion to the bonding temperature with respect to a reference point that is not a first die center.

A die bond head apparatus has a die bond head body coupled to a die bond head motion table, a die holder motion table mounted on the die bond head body and a die holder which is operative in use to secure a semiconductor die to a substrate. The die holder is positionable by the die holder motion table independently of the die bond head motion table.

A semiconductor manufacturing method of mounting a semiconductor chip or a stacked body of semiconductor chips on a support substrate placed on a stage, determines whether a predetermined condition is satisfied during a mounting processing of the semiconductor chip or the stacked body, evacuates, together with the support substrate, the semiconductor chip or the stacked body that has mounted on the support substrate before the determination when it is determined that the predetermined condition is satisfied, determines whether to resume the mounting processing of the semiconductor chip or the stacked body after the evacuation; and returns the evacuated semiconductor chip or the evacuated stacked body to a position before the evacuation and continuing the mounting processing when it is determined that the mounting processing is resumed.

A semiconductor device assembly includes a die stack, a plurality of thermoset regions, and underfill material. The die stack includes at least first and second dies that each have a plurality of conductive interconnect elements on upper surfaces. A portion of the interconnect elements are connected to through-silicon vias that extend between the upper surfaces and lower surfaces of the associated dies. The plurality of thermoset regions each comprise a thin layer of thermoset material extending from the lower surface of the second die to the upper surface of the first die, and are laterally-spaced and discrete from each other. Each of the thermoset regions extends to fill an area between a plurality of adjacent interconnect elements of the first die. The underfill material fills remaining open areas between the interconnect elements of the first die.

A resin shaping device configured to cure a resin placed in a mold in a state in which the mold is pressed against a substrate, the resin shaping device comprising: a substrate holding unit configured to hold the substrate in an orientation such that a forming face for forming a resin part on the substrate faces vertically downward; a head configured to hold the mold from vertically below; a head drive unit configured to cause the head to face a position for formation of a resin part on the substrate, and then cause vertically upward movement of the head so that the head approaches the substrate holding unit and presses the mold from vertically below the substrate; and a resin curing unit configured to cure the resin placed in the mold in a state in which the mold is pressed against the substrate.

Processing methods may be performed to form a fan-out interconnect structure. The methods may include forming a semiconductor active device structure overlying a first substrate. The semiconductor active device structure may include first conductive contacts. The methods may include forming an interconnect structure overlying a second substrate. The interconnect structure may include second conductive contacts. The methods may also include joining the first substrate with the second substrate. The joining may include coupling the first conductive contacts with the second conductive contacts. The interconnect structure may extend beyond the lateral dimensions of the semiconductor active device structure.

The present technology relates to a semiconductor device that includes an underfill resin and a light-shielding resin and allows to achieve a decrease in device size, a method of producing the same, and an electronic apparatus. The semiconductor device includes: a substrate having a pixel region in which a plurality of pixels is arranged; and one or more chips flip-chip bonded to the substrate via a connection terminal. A material of a first resin that protects a back surface of the chip and a material of a second resin that protects a side surface of the chip are different from each other. The present technology is applicable to, for example, a semiconductor device in which an image sensor chip and a signal processing chip are flip-chip bonded to each other.

Tools and systems for processing semiconductor devices, and methods of processing semiconductor devices are disclosed. In some embodiments, a method of using a tool for processing semiconductor devices includes a tool with a second material disposed over a first material, and a plurality of apertures disposed within the first material and the second material. The second material comprises a higher reflectivity than the first material. Each of the apertures is adapted to retain a package component over a support during an exposure to energy.