Die stacks and methods of making die stacks with very thin dies are disclosed. The die surfaces remain flat within a 5 micron tolerance despite the thinness of the die and the process steps of making the die stack. A residual flux height is kept below 50% of the spacing distance between adjacent surfaces or structures, e.g. in the inter-die spacing.

A semiconductor device includes a substrate having a plurality of pads on a surface of the substrate, a semiconductor chip that includes a plurality of metal bumps connected to corresponding pads on the substrate, a first resin layer between the surface of the substrate and the semiconductor chip, a second resin layer between the substrate and the semiconductor chip and between the first resin layer and at least one of the metal bumps, and a third resin layer on the substrate and above the semiconductor chip.

Methods and apparatus to embed host dies in a substrate are disclosed An apparatus includes a first die having a first side and a second side opposite the first side. The first side includes a first contact to be electrically coupled with a second die. The second side includes a second contact. The apparatus further includes a substrate including a metal layer and a dielectric material on the metal layer. The first die is encapsulated within the dielectric material. The second contact of the first die is bonded to the metal layer independent of an adhesive.

Disclosed in the present specification are a substrate for transferring, with high reliability, a semiconductor light emitting element, and a method for manufacturing a display device by using same. Particularly, when a semiconductor light emitting element is self-assembled on an assembly substrate by using an electromagnetic field, an assembly groove in which a semiconductor light emitting element for alignment is assembled is formed in the assembly substrate. The semiconductor light emitting element for alignment, assembled in the assembly groove, is used for alignment in a step of being transferred to a final wiring substrate. Unlike conventional alignment keys, the semiconductor light emitting element for alignment reflects an alignment error of semiconductor light emitting elements that occurs during a transfer process after assembly. Therefore, when semiconductor light emitting elements are transferred to a wiring substrate on the basis of the semiconductor light emitting element for alignment, transfer accuracy can be improved.

Provided is a semiconductor device capable of maintaining the flatness of a glass substrate and sufficiently protecting an end portion of the glass substrate. A semiconductor device according to one aspect of the present disclosure includes: a glass substrate including a first surface, a second surface opposite to the first surface, and a first side surface between the first surface and the second surface; wirings provided on the first and second surfaces; a first insulating film that covers the first surface; a second insulating film that covers the second surface; and a third insulating film that covers the first side surface, the third insulating film being continuous with at least one of the first and second insulating films.

A window assembly includes a transparent window layer and a first coded mask layer provided on a first surface of the window layer, the first coded mask layer having a first shape configured to change a first property of light passing through the window assembly. The first coded mask layer may include a meta-surface including a phase modulation meta-pattern. The meta-surface may further include an amplitude modulation meta-pattern. A second coded mask layer having a second shape configured to change a second property of the light passing through the window assembly may further be provided on a second surface of the window layer.

Metal-free frame designs for silicon bridges for semiconductor packages and the resulting silicon bridges and semiconductor packages are described. In an example, a semiconductor structure includes a substrate having an insulating layer disposed thereon, the substrate having a perimeter. A metallization structure is disposed on the insulating layer, the metallization structure including conductive routing disposed in a dielectric material stack. A first metal guard ring is disposed in the dielectric material stack and surrounds the conductive routing. A second metal guard ring is disposed in the dielectric material stack and surrounds the first metal guard ring. A metal-free region of the dielectric material stack surrounds the second metal guard ring. The metal-free region is disposed adjacent to the second metal guard ring and adjacent to the perimeter of the substrate.

Semiconductor devices and methods of manufacture thereof are disclosed. In some embodiments, a method of manufacturing a device includes coupling a first semiconductor device to a second semiconductor device by spacers. The first semiconductor device has first contact pads disposed thereon, and the second semiconductor device has second contact pads disposed thereon. The method includes forming an immersion interconnection between the first contact pads of the first semiconductor device and the second contact pads of the second semiconductor device.

The purpose of the present invention is to provide an adhesive composition which allows an alignment mark to be recognized, ensures sufficient solder wettability of a joining section, and is excellent in suppression of void generation. The adhesive composition includes: a high-molecular compound (A); an epoxy compound (B) having a weight average molecular weight of 100 or more and 3,000 or less; and a flux (C); and inorganic particles (D) which have on the surfaces thereof an alkoxysilane having a phenyl group and which have an average, particle diameter of 30 to 200 nm, the flux (C) containing an acid-modified rosin.

A display panel and a manufacturing method thereof are provided. The display panel includes a substrate, first sub-pixels and second sub-pixels. The first sub-pixels are disposed on the substrate. The first sub-pixels have a first orienting characteristic. A first adherent material is disposed between the first sub-pixels and the substrate. The second sub-pixels are disposed on the substrate. The second sub-pixels have a second orienting characteristic. A second adherent material is disposed between the second sub-pixels and the substrate. The first orienting characteristic and the second orienting characteristic are different. The first adherent material and the second adherent material are different.