A first wiring is disposed above operating regions of plural unit transistors formed on a substrate. A second wiring is disposed above the substrate. An insulating film is disposed on the first and second wirings. First and second cavities are formed in the insulating film. As viewed from above, the first and second cavities entirely overlap with the first and second wirings, respectively. A first bump is disposed on the insulating film and is electrically connected to the first wiring via the first cavity. A second bump is disposed on the insulating film and is electrically connected to the second wiring via the second cavity. As viewed from above, at least one of the plural operating regions is disposed within the first bump and is at least partially disposed outside the first cavity. The planar configuration of the first cavity and that of the second cavity are substantially identical.

A method for forming a semiconductor structure includes following operations. A first substrate including a first side, a second side opposite to the first side, and a metallic pad disposed over the first side is received. A dielectric structure including a first trench directly above the metallic pad is formed. A second trench is formed in the dielectric structure and a portion of the first substrate. A sacrificial layer is formed to fill the first trench and the second trench. A third trench is formed directly above the metallic pad. A barrier ring and a bonding structure are formed in the third trench. A bonding layer is disposed to bond the first substrate to a second substrate. A portion of the second side of the first substrate is removed to expose the sacrificial layer. The sacrificial layer is removed by an etchant.

A method for forming a semiconductor structure includes following operations. A first substrate including a first side, a second side opposite to the first side, and a metallic pad disposed over the first side is received. A dielectric structure including a first trench directly above the metallic pad is formed. A second trench is formed in the dielectric structure and a portion of the first substrate. A sacrificial layer is formed to fill the first trench and the second trench. A third trench is formed directly above the metallic pad. A barrier ring and a bonding structure are formed in the third trench. A bonding layer is disposed to bond the first substrate to a second substrate. A portion of the second side of the first substrate is removed to expose the sacrificial layer. The sacrificial layer is removed by an etchant.

In various embodiments, a method for forming a bonded structure is disclosed. The method can comprise mounting a first integrated device die to a carrier. After mounting, the first integrated device die can be thinned. The method can include providing a first layer on an exposed surface of the first integrated device die. At least a portion of the first layer can be removed. A second integrated device die can be directly bonded to the first integrated device die without an intervening adhesive.

In various embodiments, a method for forming a bonded structure is disclosed. The method can comprise mounting a first integrated device die to a carrier. After mounting, the first integrated device die can be thinned. The method can include providing a first layer on an exposed surface of the first integrated device die. At least a portion of the first layer can be removed. A second integrated device die can be directly bonded to the first integrated device die without an intervening adhesive.

A semiconductor device includes a wiring substrate and multiple semiconductor chips mounted on the wiring substrate by flip chip bonding with a resin being interposed between the wiring substrate and the semiconductor chips. The wiring substrate includes a chip mounting region in which the semiconductor chips are arranged in a matrix, and a resin injection region protruding from an end of the chip mounting region. The outer edge of the wiring substrate in the chip mounting region is positioned inward of the outer edge of the semiconductor chips arranged in the matrix. The outer edge of the wiring substrate in the resin injection region protrudes outward of the outer edge of the semiconductor chips arranged in the matrix.

A semiconductor device includes a wiring substrate and multiple semiconductor chips mounted on the wiring substrate by flip chip bonding with a resin being interposed between the wiring substrate and the semiconductor chips. The wiring substrate includes a chip mounting region in which the semiconductor chips are arranged in a matrix, and a resin injection region protruding from an end of the chip mounting region. The outer edge of the wiring substrate in the chip mounting region is positioned inward of the outer edge of the semiconductor chips arranged in the matrix. The outer edge of the wiring substrate in the resin injection region protrudes outward of the outer edge of the semiconductor chips arranged in the matrix.

A semiconductor structure includes a first substrate, a metallic pad disposed over the first substrate, a dielectric structure disposed over the first substrate and exposing a portion of the metallic pad, a bonding structure disposed over and electrically connected to the metallic pad, a barrier ring surrounding the bonding structure, and a through-hole penetrating the first substrate and the dielectric structure. The bonding structure includes a bottom and a sidewall, the bottom of the bonding structure is in contact with the metallic pad, a first portion of the sidewall of the bonding structure is in contact with the dielectric structure, and a second portion of the sidewall of the bonding structure is in contact with the barrier ring.

A semiconductor structure includes a first substrate, a metallic pad disposed over the first substrate, a dielectric structure disposed over the first substrate and exposing a portion of the metallic pad, a bonding structure disposed over and electrically connected to the metallic pad, a barrier ring surrounding the bonding structure, and a through-hole penetrating the first substrate and the dielectric structure. The bonding structure includes a bottom and a sidewall, the bottom of the bonding structure is in contact with the metallic pad, a first portion of the sidewall of the bonding structure is in contact with the dielectric structure, and a second portion of the sidewall of the bonding structure is in contact with the barrier ring.

An electronic device includes a first metal plate including a first wiring and a second wiring, an electronic component mounted on a lower surface of the first wiring so as to overlap the second wiring in plan view, a second metal plate including an electrode electrically connected to the lower surface of the first wiring, and an insulation layer filling a space between the first metal plate, the second metal plate, and the electronic component and covering the electronic component. The upper surface of the second wiring is exposed from the insulation layer.