A device is provided. The device includes a bridge layer over a first substrate. A first connector electrically connecting the bridge layer to the first substrate. A first die is coupled to the bridge layer and the first substrate, and a second die is coupled to the bridge layer.

A semiconductor device includes an insulating carrier structure comprised of an insulating inorganic material. The carrier structure has a receptacle in which a semiconductor chip is disposed. The semiconductor chip has a first side, a second side and a lateral rim. The carrier structure laterally surrounds the semiconductor chip and the lateral rim. The semiconductor device also includes a metal structure on and in contact with the second side of the semiconductor chip and embedded in the carrier structure.

A method is provided. The method includes attaching a bridge layer to a first substrate. The method also includes forming a first connector, the first connector electrically connecting the bridge layer to the first substrate. The method also includes coupling a first die to the bridge layer and the first substrate, and coupling a second die to the bridge layer.

A semiconductor package and a method of manufacturing the same are provided. The semiconductor package includes a semiconductor die, a cap layer, a conductive terminal, and a dam structure. The semiconductor die has a first surface. The cap layer is over the semiconductor die and has a second surface facing the first surface of the semiconductor die. The conductive terminal penetrates the cap layer and electrically connects to the semiconductor die. The dam structure is between the semiconductor die and the cap layer and surrounds a portion of the conductive terminal between the first surface and the second surface, thereby forming a gap between the cap layer and the semiconductor die.

The invention relates to a method (20) for producing an electric circuit (2) in which a circuit carrier (4) comprising a first contact surface (14) and a second contact surface (16) is provided. An insulating body (26) is placed on the circuit carrier (4), wherein the insulating body (26) at least partially covers the first contact surface (14) and the second contact surface (16), and the insulating body (26) comprises a recess (34) in the region of both contact surfaces (14, 16). A flowable electro-conductive medium (44) is introduced into the insulating body (26). The invention also relates to an electric circuit (2) and to a further method (60) for producing an electric circuit (2).

A bonding method is provided. A sheet structure is placed on a substrate surface, and a surface roughness of a surface of the sheet structure is less than or equal to 1.0 micrometer. A carbon nanotube structure is laid on the surface of the sheet structure. Two ends of the carbon nanotube structure are in direct contact with the substrate surface. An organic solvent is added to the two ends of the carbon nanotube structure. An object is laid on the carbon nanotube structure, and a surface of the object being in direct contact with the carbon nanotube structure has a surface roughness less than or equal to 1.0 micrometer.

A bonding method is provided. A sheet structure is placed on a substrate surface, and a surface roughness of a surface of the sheet structure is less than or equal to 1.0 micrometer. A carbon nanotube structure is laid on the surface of the sheet structure. Two ends of the carbon nanotube structure are in direct contact with the substrate surface. An organic solvent is added to the two ends of the carbon nanotube structure. An object is laid on the carbon nanotube structure, and a surface of the object being in direct contact with the carbon nanotube structure has a surface roughness less than or equal to 1.0 micrometer.

An electronic sub-assembly (36) comprising at least one electronic component (14) embedded in a sequence of layers, wherein the electronic component (14) is arranged in a recess of an electrically conductive central layer (16) and directly adjoins a resin layer (12, 20) on each side.

Embodiments of the present disclosure are directed towards a method of assembling an integrated circuit package. In embodiments the method may include providing a wafer having an unpatterned passivation layer to prevent corrosion of metal conductors embedded in the wafer. The method may further include laminating a dielectric material on the passivation layer to form a dielectric layer and selectively removing dielectric material to form voids in the dielectric layer. These voids may reveal portions of the passivation layer disposed over the metal conductors. The method may then involve removing the portions of the passivation layer to reveal the metal conductors. Other embodiments may be described and/or claimed.

A solder connection may be surrounded by a solder locking layer (1210, 2210) and may be recessed in a hole (1230) in that layer. The recess may be obtained by evaporating a vaporizable portion (1250) of the solder connection. Other features are also provided.