A bonding substrate is described having a contacting pad made of copper or a copper-based alloy for bonding wire, the contacting pad being covered with a corrosion inhibitor layer containing a nitrogen-containing aliphates as an active substance and a nitrogen-containing heterocyclic aromatics as a further active substance. The corrosion inhibitor layer, without any water content, contains 5% by weight or more of urea derivative or 3% by weight or more of triphenylguanidine or 2% by weight or more of tetrazole derivative or 5% by weight or more of 1-H-benzotriazole or 5% by weight or more of benzimidazole. In addition, an electronic module having such a bonding substrate and a method of protecting from corrosion surfaces made of copper or a copper-base alloy provided for wire bonding are disclosed.

A semiconductor device includes a die paddle, a plurality of electrically conductive leads extending away from the die paddle, and an adhesion promoter plating material selectively formed on the electrically conductive leads such that outer portions of the leads are covered by the adhesion promoter plating material, and interior portions of the leads that are disposed between the die paddle and the respective outer portions of each lead are substantially devoid of the adhesion promoter plating material.

According to an aspect, a semiconductor power module includes a substrate, a semiconductor device coupled to the substrate, a bond wire coupled to the semiconductor device, and a first molding material layer disposed on the substrate. The first molding material layer encapsulates a first portion of the bond wire. The bond wire has a second portion disposed outside of the first molding material layer. The semiconductor power module includes a second molding material layer disposed on the first molding material layer. The second molding material layer encapsulates the second portion of the bond wire. The second molding material layer has a hardness less than a hardness of the second molding material layer.

According to an aspect, a semiconductor power module includes a substrate, a semiconductor device coupled to the substrate, a bond wire coupled to the semiconductor device, and a first molding material layer disposed on the substrate. The first molding material layer encapsulates a first portion of the bond wire. The bond wire has a second portion disposed outside of the first molding material layer. The semiconductor power module includes a second molding material layer disposed on the first molding material layer. The second molding material layer encapsulates the second portion of the bond wire. The second molding material layer has a hardness less than a hardness of the second molding material layer.

A lead frame strip having a plurality of unit lead frames is provided. Each of the unit lead frames have a die paddle and a plurality of leads extending away from the die paddle. A first one of the unit lead frames is plated with an adhesion promoter plating material within a package outline area of the first unit lead frame. The package outline area includes one of the die paddles and interior portions of the leads. Wire bond sites are processed in the first unit lead frame before or after the plating of the first lead frame such that, after the plating of the first lead frame. The wire bond sites are substantially devoid of the adhesion promoter plating material. The wire bond sites are disposed within the package outline area at an end of the interior portions of the leads that is closest to the die paddle.

A remapped extracted die is provided. The remapped extracted die includes an extracted die removed from a previous integrated circuit package. The extracted die includes a plurality of original bond pads having locations that do not correspond to desired pin assignments of a new package base and an interposer, bonded to the extracted die. The interposer includes first bond pads configured to receive new bond wires from the plurality of original bond pads, and second bond pads corresponding to desired pin assignments of the new package base, each individually electrically coupled to one of the first bond pads and configured to receive new bond wires from package leads or downbonds of the new package base.

Methods, systems and devices are disclosed for performing a semiconductor processing operation. In some embodiments this includes configuring a wire bonding machine to perform customized movements with a capillary tool of the wire bonding machine, etching bulk contaminants over one or more locations of a semiconductor device with the capillary tool, and applying plasma to the semiconductor device to remove residual contaminants.

A method for treating a bare copper wire and a surface-treated copper wire includes applying a solution including a phosphoric acid-based chelating agent to a surface of a bare copper wire, and drying the copper wire having the solution including the phosphoric acid-based chelating agent attached on the surface thereof.

A remapped extracted die is provided. The remapped extracted die includes an extracted die removed from a previous integrated circuit package. The extracted die includes a plurality of original bond pads having locations that do not correspond to desired pin assignments of a new package base and an interposer, bonded to the extracted die. The interposer includes first bond pads configured to receive new bond wires from the plurality of original bond pads, and second bond pads corresponding to desired pin assignments of the new package base, each individually electrically coupled to one of the first bond pads and configured to receive new bond wires from package leads or downbonds of the new package base.

A lead frame strip having a plurality of unit lead frames is provided. Each of the unit lead frames have a die paddle and a plurality of leads extending away from the die paddle. A first one of the unit lead frames is plated with an adhesion promoter plating material within a package outline area of the first unit lead frame. The package outline area includes one of the die paddles and interior portions of the leads. Wire bond sites are processed in the first unit lead frame before or after the plating of the first lead frame such that, after the plating of the first lead frame. The wire bond sites are substantially devoid of the adhesion promoter plating material. The wire bond sites are disposed within the package outline area at an end of the interior portions of the leads that is closest to the die paddle.